Exploiting Lithography Limits for Hardware Security Applications

Exploiting Lithography Limits for Hardware Security Applications
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DOI:
10.1109/nano46743.2019.8993902
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发表时间:
2019-07
期刊:
2019 IEEE 19th International Conference on Nanotechnology (IEEE-NANO)
影响因子:
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通讯作者:
R. Khan;H. Silva;Nafisa Noor;Chenglu Jin;Sadid Muneer;F. Dirisaglik;A. Cywar;Phuong Ha Nguyen;M. Van Dijk;A. Gokirmak
R. Khan;H. Silva;Nafisa Noor;Chenglu Jin;Sadid Muneer;F. Dirisaglik;A. Cywar;Phuong Ha Nguyen;M. Van Dijk;A. Gokirmak
中科院分区:
其他
文献类型:
--
作者:
R. Khan;H. Silva;Nafisa Noor;Chenglu Jin;Sadid Muneer;F. Dirisaglik;A. Cywar;Phuong Ha Nguyen;M. Van Dijk;A. Gokirmak

文献摘要

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诸如物理混淆密钥(POK)之类的硬件安全原语允许基于制造或物理可变性对随机密钥进行防篡改存储。现有POK设计的输出比特需要首先由于测量噪声而使用纠错方法进行校正,然后通过隐私放大过程进行去相关。这些额外的要求增加了硬件开销并降低了系统的效率。在这项工作中,我们提出了一个本质上可靠的POK设计能够产生随机位,利用光刻工艺的限制,对于一个给定的技术。我们的设计不需要任何纠错,只需要异或电路的隐私放大,从而减少了整个系统的硬件开销。
Hardware security primitives such as physical obfuscated keys (POKs) allow tamper-resistant storage of random keys based on manufacturing or physical variability. The output bits of existing POK designs need to be first corrected due to measurement noise using error correction methods and then de-correlated by privacy amplification processes. These additional requirements increase the hardware overhead and reduce the efficiency of the system. In this work, we propose an intrinsically reliable POK design capable of generating random bits by exploiting the limits of the lithographic process for a given technology. Our design does not require any error correction and requires only XOR circuits for privacy amplification which reduces the hardware overhead of the whole system.