Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems
Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems
复制标题
用于高性能 VLSI 系统的多值基 2 有符号数运算电路
DOI：
10.1109/4.50294
复制
发表时间：
1990
影响因子：
5.4
通讯作者：
T. Higuchi
中科院分区：
文献类型：
--
作者：
S. Kawahito;M. Kameyama;T. Higuchi
提出了一种基于VLSI的基2符号数表示的多值电流型MOS运算电路。一个原型加法器芯片实现与10 μ m CMOS工艺，以确认工作原理。提出了一种采用四输入电流模式有线求和实现高速小型乘法器的方案。32*32-B乘法器由18800个晶体管组成，需要较少的互连。在2 μ m CMOS工艺下，通过SPICE仿真，乘法时间约为45 ns.结果表明，该技术对减小超大规模集成电路中的数据总线面积也是潜在的有效方法。>
VLSI-oriented multiple-valued current-mode MOS arithmetic circuits using radix-2 signed-digit number representations are proposed. A prototype adder chip is implemented with 10- mu m CMOS technology to confirm the principle of operation. A multiplication scheme using four-input current-mode wired summations for realizing a high-speed small-size multiplier is presented. The 32*32-b multiplier is composed of 18800 transistors and required fewer interconnections. The multiply time is estimated to be 45 ns by SPICE simulation in 2- mu m CMOS technology. It is shown that the technology is also potentially effective for the reduction of the data-bus area in VLSI. >