Nanowire-based programmable architectures
Nanowire-based programmable architectures
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DOI：
10.1145/1084748.1084750
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发表时间：
2005-07
期刊：
影响因子：
--
通讯作者：
A. DeHon
中科院分区：
文献类型：
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作者：
A. DeHon
现在，化学家可以构造直径仅几个原子的电线。这些电线可以被选择性地进行场效应，并且电线横梁可以用作具有可编程电阻的二极管。这些新功能提出了构建纳米级计算系统的机遇和挑战。微小的特征尺寸为经济扩展到原子维度提供了一条途径。但是，相关的自下而上的合成技术仅产生高度规则的结构，并且在组装过程中具有高缺陷率和最小的控制。为了利用这些技术，我们开发了基于纳米线的架构，它们可以在光刻和原子尺度之间桥接，并耐受常规阵列的缺陷和随机组装，以提供高密度的通用计算设备。这些基于纳米线的可编程架构使用10nm螺距纳米线，比无缺陷的光刻FPGA在22nm时提供的映射密度比两个数量级高。
Chemists can now construct wires which are just a few atoms in diameter; these wires can be selectively field-effect gated, and wire crossings can act as diodes with programmable resistance. These new capabilities present both opportunities and challenges for constructing nanoscale computing systems. The tiny feature sizes offer a path to economically scale down to atomic dimensions. However, the associated bottom-up synthesis techniques only produce highly regular structures and come with high defect rates and minimal control during assembly. To exploit these technologies, we develop nanowire-based architectures which can bridge between lithographic and atomic-scale feature sizes and tolerate defective and stochastic assembly of regular arrays to deliver high density universal computing devices. Using 10nm pitch nanowires, these nanowire-based programmable architectures offer one to two orders of magnitude greater mapped-logic density than defect-free lithographic FPGAs at 22nm.