Optimization of SFQ logic gate considering dependence of its signal propagation delay on the bias voltage
Optimization of SFQ logic gate considering dependence of its signal propagation delay on the bias voltage
复制标题
考虑信号传播延迟对偏置电压的依赖性的 SFQ 逻辑门优化
DOI：
10.1016/j.phpro.2014.09.059
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发表时间：
2014
期刊：
影响因子：
--
通讯作者：
N. Yoshikawa
中科院分区：
文献类型：
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作者：
M. Otsubo;Y. Yamanashi;N. Yoshikawa
超导单通量量子（SFQ）数字电路可以在几十千兆赫的时钟频率下工作。SFQ逻辑电路的操作裕度通常随着操作频率的增加而减小，这是因为由数据线和时钟线之间的信号传播延迟的偏置依赖性的差异引起的低偏置区域中的定时误差。我们提出了一种改进的工作裕度通过控制信号传播时间对偏置电压的依赖性。在本研究中，我们研究了一种新的SFQ逻辑门的优化方法。我们开发了一种新的电路参数优化器，它不仅考虑到偏置裕度，但也信号传播延迟对偏置电压的依赖性。我们定义了一个适当的评价函数的优化。从使用定义的评价函数的优化结果，我们设计和演示了SFQ与门优化使用新的优化器。
Superconductive single flux quantum (SFQ) digital circuits can operate at a clock frequency of several tens of gigahertz. The operating margin of an SFQ logic circuit generally decreases with an increase in the operating frequency because of the timing error in the low-bias region caused by the difference in bias dependence of the signal-propagation delay between the data and clock lines. We proposed an improvement in the operating margin by controlling the dependence of the signal-propagation time on the bias voltage. In the present study, we investigated a new optimization method for an SFQ logic gate. We developed a new circuit parameter optimizer, which takes into account not only the bias margin but also the dependence of the signal-propagation delay on the bias voltage. We defined an appropriate evaluation function for the optimization. From the result of the optimization using the defined evaluation function, we designed and demonstrated an SFQ AND gate optimized using the new optimizer.