Benefits and costs of power-gating technique

Benefits and costs of power-gating technique
复制标题

功率门控技术的优点和成本

DOI:
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发表时间:
2005
期刊:
ICCD
影响因子:
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通讯作者:
S. Nassif
S. Nassif
中科院分区:
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文献类型:
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作者:
Hailin Jiang;M. Marek;S. Nassif

文献摘要

被引文献

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功率门控是一种通过关闭空闲块来节省泄漏功率的技术。然而,如果没有良好的理解和仔细的设计,功率门控的负面影响可能会压倒潜在的增益,并可能使该技术不值得努力。在本文中,我们报告我们的研究的好处和成本的功率门控技术的功率,面积和性能。我们的模型和分析几个强烈相关的参数,如睡眠晶体管的大小,开盖面积,和电源电压水平。我们还报告了我们的实验,以证明门控面积,电路行为和电源网格粒度如何影响电源门控技术在系统级。实验结果表明,在保持相同性能的前提下,通过牺牲4%的总面积和5%的动态功耗,可以实现47%的泄漏功耗节省。随着技术规模的缩小,节省的费用是巨大的。我们的结论是,我们可以受益于电源门控技术在未来的技术节点。
Power-gating is a technique for saving leakage power by shutting off the idle blocks. However, without good understanding and careful design, negative effects of power gating may overwhelm the potential gain and may make the technique not worth the effort. In this paper, we report on our study of the benefits and costs of the power-gating technique in terms of power, area, and performance. We model and analyze several strongly related parameters such as sleep-transistor size, decap area, and supply voltage level. We also report on our experiments to demonstrate how the gated area, circuit behavior and power mesh granularity affect the power gating technique at the system level. Experimental results show that, by compromising 4% of the total area and 5% of the dynamic power, we can achieve 47% leakage power saving while maintaining the same performance. With technology scaling down, the saving is significant. We conclude that we can benefit from the power-gating technique in future technology nodes.