Coping with process variations in ultra-low power CMOS analog integrated circuits
Coping with process variations in ultra-low power CMOS analog integrated circuits
复制标题
应对超低功耗 CMOS 模拟集成电路的工艺变化
DOI：
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复制
发表时间：
2007
期刊：
影响因子：
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通讯作者：
E. Arvas
中科院分区：
文献类型：
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作者：
Z. Wang;H. Savci;J. Griggs;N. Dogan;E. Arvas
超低功耗模拟/RF CMOS电路对于电池供电的电子产品至关重要。通过在弱到中等反转和非常小的超速电压下操作MOS晶体管，可以满足低电源电压和电流要求。这种技术的优势是以实现复杂和激进的设计负担为代价的。因此，设计人员应该控制电路的行为，如工艺、电源和温度变化。本文提出了一种动态调整阈值电压以克服工艺和电源变化的技术。所提出的技术（DTMOS）用于数字和模拟/RF设计。仿真结果表明，该方法可以有效地补偿由于工艺参数不确定性和电源电压偏差引起的漏极电流和跨导变化。
Ultra-low power analog/RF CMOS circuits are critical for battery-operated electronics. Low-supply voltage and current requirements are met by operating MOS transistors in weak to moderate inversions and very small overdrive voltages. The advantage of this technique comes with the price of complex and aggressive design burdens to be achieved. Therefore designers should have control over the behavior of their circuits such as the process, supply, and temperature variations. This paper presents a technique, which dynamically adjusts the threshold voltage to overcome the process and supply variation. Proposed technique (DTMOS) is used for digital and analog/RF designs. The simulation results show that with the proposed technique the variations in drain current and transconductance due to uncertainty of the process parameters and voltage deviations in the power supplies could be successfully compensated.