High-performance circuit design for the RET-enabled 65-nm technology node
High-performance circuit design for the RET-enabled 65-nm technology node
复制标题
支持 RET 的 65 纳米技术节点的高性能电路设计
DOI：
10.1117/12.538242
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发表时间：
2004
期刊：
影响因子：
--
通讯作者：
L. Sigal
中科院分区：
文献类型：
--
作者：
L. Liebmann;A. E. Barish;Z. Baum;H. Bonges;S. Bukofsky;C. Fonseca;S. Halle;G. Northrop;S. Runyon;L. Sigal
描述了IBM领先的65nm微处理器多导体级的交变相移掩模光刻技术的实现。非常广泛和“分辨率增强技术通用”的设计规则，称为激进设计限制，被证明是交替相移掩模设计的关键促成因素。这些激进的设计限制优于传统的设计规则和其他交替相移掩模设计方法，详细说明了设计流程的关键方面。
The implementation of alternating phase shifted mask lithography for the poly-conductor level of IBM's leading edge 65nm microprocessor is described. Very broad and 'resolution-enhancement-technology generic' design rules, referred to as radical design restrictions, are demonstrated to be key enablers of alternating phase shifted mask design. The benefit of these radical design restrictions over conventional design rules and other alternating phase shifted mask design approaches is detailed for key aspects of the design flow.