Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems

Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
复制标题

支持 DVS 的实时嵌入式系统的可靠性感知优化

DOI:
--
复制
发表时间:
2008
期刊:
IEEE International Symposium on Quality Electronic Design
影响因子:
--
通讯作者:
M. Sarrafzadeh
M. Sarrafzadeh
中科院分区:
--
文献类型:
--
作者:
F. Dabiri;Navid Amini;Mahsan Rofouei;M. Sarrafzadeh

文献摘要

被引文献

相似文献

功率和能量消耗已经成为现代计算系统中首要和最受限制的方面。动态电压调度(DVS)已被证明是最有效的技术之一,用于实现低功耗规格。另一方面,随着逻辑门(和晶体管)的特征尺寸变得越来越小,由单粒子翻转(SEU)引起的软错误率的影响变得呈指数级增大。降低电源电压以节省能量增加了由SEU引起的软错误率,原因有两个:I)较低的电压使数字电路更容易发生软错误,以及II)电源电压的降低增加了过程的持续时间,这增加了被SEU击中的机会。在本文中,我们提出了一个最佳的方法DVS的任务图考虑软错误率。我们考虑了电压对单粒子翻转的影响,并将这种依赖性纳入我们的公式中,以开发一种新的单粒子翻转约束下的能量优化方法。我们还提出了一个凸规划公式,可以有效地解决和优化。通过在TGFF基准上的仿真,我们证明了我们的优化结果的有效性。
Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic voltage scheduling (DVS) has been provably one of the most effective techniques used to achieve low power specification. On the other hand, as the feature size of logic gates (and transistors) is becoming smaller and smaller, the effect of soft error rates caused by single event upsets (SEUs) becomes exponentially greater. Lowering supply voltage to save energy increases soft error rates caused by SEU for two reasons: I) lower voltage makes digital circuits more prone to soft errors and II) reduction in supply voltage, increases the duration of process which increases the chances of being hit by SEU. In this paper, we propose an optimal methodology for DVS on a task graph with consideration of soft error rate. We consider the effects of voltage on SEU and incorporate this dependency in our formulation to develop a new method for energy optimization under SEU constraints. We also propose a convex programming formulation that can be solved efficiently and optimally. We show the effectiveness of our optimal results by simulation on TGFF benchmarks.