A 10 000 frames/s CMOS digital pixel sensor
A 10 000 frames/s CMOS digital pixel sensor
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DOI：
10.1109/4.972156
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发表时间：
2001-12-01
影响因子：
5.4
通讯作者：
El Gamal, A
中科院分区：
文献类型：
--
作者：
Kleinfelder, S;Lim, S;El Gamal, A
一个352 × 288像素的CMOS图像传感器芯片与每像素的单斜率ADC和动态存储器在一个标准的数字0.18妈妈CMOS工艺。该芯片完成“快照”图像采集、并行8位A/D转换和数字读出，连续速率为10000帧/s或1Gpixels/s，功耗为50 mW。每个像素包括一个光电门电路，一个三级比较器，和一个8位3 T动态存储器，包括一个9.4 × 9.4微米的填充因子为15%的37个晶体管。光电门量子效率为13.6%，传感器转换增益为13.1 μ V/e（-）。在1000帧/秒时，在1 V范围内测得的积分非线性为0.22%，数字CDS的均方根时间噪声为0.15%，数字CDS的均方根FPN为0.027%。在低帧速率下工作时，片内电源管理电路允许在每次帧转换和读出之间完全掉电。数字化的像素数据在工作于167 MHz的64位（8像素）宽总线上读出，即，超过1.33 GB/s。该芯片适用于一般的高速成像应用，也适用于实现几种静态和标准视频速率应用，这些应用都受益于高速捕获，例如动态范围增强、运动估计和补偿以及图像稳定。
A 352 x 288 pixel CMOS image sensor chip with per-pixel single-slope ADC and dynamic memory in a standard digital 0.18-mum CMOS process is described. The chip performs "snapshot" image acquisition, parallel 8-bit A/D conversion, and digital readout at continuous rate of 10000 frames/s or 1 Gpixels/s with power consumption of 50 mW. Each pixel consists of a photogate circuit, a three-stage comparator, and an 8-bit 3T dynamic memory comprising a total of 37 transistors in 9.4 x 9.4 mum with a fill factor of 15%. The photogate quantum efficiency is 13.6%, and the sensor conversion gain is 13.1 muV/e(-). At 1000 frames/s, measured integral nonlinearity is 0.22% over a 1-V range, rms temporal noise with digital CDS is 0.15%, and rms FPN with digital CDS is 0.027%. When operated at low frame rates, on-chip power management circuits permit complete powerdown between each frame conversion and readout. The digitized pixel data is read out over a 64-bit (8-pixel) wide bus operating at 167 MHz, i.e., over 1.33 GB/s. The chip is suitable for general high-speed imaging applications as well as for the implementation of several still and standard video rate applications that benefit from high-speed capture, such as dynamic range enhancement, motion estimation and compensation, and image stabilization.