Transistor leakage fault location with I/sub DDQ/ measurement

Transistor leakage fault location with I/sub DDQ/ measurement
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通过 I/sub DDQ/测量进行晶体管漏电故障定位

DOI:
10.1109/ats.1995.485316
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发表时间:
1995
期刊:
Proceedings of the Fourth Asian Test Symposium
影响因子:
--
通讯作者:
K. Kinoshita
K. Kinoshita
中科院分区:
--
文献类型:
--
作者:
X. Wen;H. Tamamoto;K. Kinoshita

文献摘要

被引文献

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本文讨论了仅通过I/sub DDQ/测量来定位晶体管泄漏故障的问题。为了减少必须考虑的故障数量,提出了一种新的等效故障折叠方法。通过使用随机测试和确定性测试来进行故障定位,以便通过少量测试获得高诊断分辨率。实验结果表明,在许多情况下,诊断出的故障仅限于几个门,对于门阵列电路可以达到很高的平均诊断分辨率。
This paper discusses the problem of locating transistor leakage faults with only I/sub DDQ/ measurement. A new approach of equivalence fault collapsing is proposed for reducing the number of faults that must be considered. Fault location is performed by using both random and deterministic tests in order to obtain a high diagnostic resolution with a small number of tests. The experimental results show that the diagnosed faults are confined to only a few gates in many cases and that a very high average diagnostic resolution can be achieved for a gate-array circuit.