Branch Target Buffer Design and Optimization
Branch Target Buffer Design and Optimization
复制标题
分支目标缓冲区设计与优化
DOI：
10.1109/12.214687
复制
发表时间：
1993
期刊：
影响因子：
--
通讯作者：
A. Smith
中科院分区：
文献类型：
--
作者：
Chris H. Perleberg;A. Smith
分支目标缓冲器（BTB）可以通过预测分支的路径和高速缓存由分支使用的信息来减少流水线处理器中的分支的性能损失。在设计的BTB，实现最大的性能与有限数量的位分配给BTB实现的两个主要问题进行了讨论。第一是BTB管理。研究了一种丢弃BTB中分支的方法。该方法丢弃了具有最小期望值的分支以提高性能;它以额外的复杂度为代价，以较小的幅度优于最近最少使用（LRU）策略。第二个问题是在BTB中存储什么信息的问题。BTB条目可以由以下一个或多个组成：分支标签、预测信息、分支目标地址和分支目标处的指令。各种BTB的设计，一个或多个这些领域，进行评估和比较。>
A branch target buffer (BTB) can reduce the performance penalty of branches in pipelined processors by predicting the path of the branch and caching information used by the branch. Two major issues in the design of BTBs that achieves maximum performance with a limited number of bits allocated to the BTB implementation are discussed. The first is BTB management. A method for discarding branches from the BTB is examined. This method discards the branch with the smallest expected value for improving performance; it outperforms the least recently used (LRU) strategy by a small margin, at the cost of additional complexity. The second issue is the question of what information to store in the BTB. A BTB entry can consist of one or more of the following: branch tag, prediction information, the branch target address, and instructions at the branch target. Various BTB designs, with one or more of these fields, are evaluated and compared. >