A Formal Methodology for Fault Tree Construction
A Formal Methodology for Fault Tree Construction
复制标题
DOI：
10.13182/nse73-a23308
复制
发表时间：
1973-12
影响因子：
1.2
通讯作者：
J. B. Fussell
中科院分区：
文献类型：
--
作者：
J. B. Fussell
根据相关原理图和与系统无关的元件信息，提出了一种用于描述电气系统布尔故障逻辑的模型，称为故障树。该模型是为电气系统详细开发的，其含义和术语扩展到所有故障树构造。对于具有大约7秒的100个门的故障树(在UNIVAC 1108计算机上)，由具有典型执行时间的计算机构建的故障树验证了该方法是正式的。该模型称为合成树模型，是一种综合技术，它通过适当的编辑，从与系统无关的部件信息拼接成故障树，从感兴趣的主要故障开始，然后进行到更基本的故障。生成的故障树采用常规格式，使用常规符号，因此与现有解决方案技术直接兼容。虽然合成树模型将故障树扩展到主要故障的级别，但该模型的扩展可以处理次要故障，即部件之间的故障相关反馈。(身份验证)
A model is presented for formulating the Boolean failure logic, cailed the fault tree, for electrical systems from associated schematic diagrams and system-independent component information. The model is developed in detail for electrical systems, while its implication and terminology extend to all fault tree construction. The methodology is verified as formal by fault trees constructed by a computer with typical execution times for a fault tree with 100 gates on the order of 7 sec (on the UNIVAC 1108 computer). The model, called Synthetic Tree Model, is a synthesis technique for piecing together, with proper editing, a fault tree from system-independent component information beginnlng with the main failure of interest and proceeding to more basic failures. The resultant fault trees are in conventional format, use conventional symbols, and are, consequently, immediately compatible with existing solutions techniques. While Synthetic Tree Model develops the fault tree to the level of primary failures, extensions of the model could handle secondary failures, i.e., failure- related feedback between components. ( auth)