An enhanced thermo-compression bonding process to address warpage in 3D integration of large die on organic substrates
An enhanced thermo-compression bonding process to address warpage in 3D integration of large die on organic substrates
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增强型热压接合工艺可解决有机基板上大型芯片 3D 集成中的翘曲问题
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发表时间：
2015
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通讯作者：
S. Iyer
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作者：
K. Sakuma;K. Tunga;B. Webb;K. Ramachandran;M. Interrante;Hsichang Liu;M. Angyal;D. Berger;J. Knickerbocker;S. Iyer
在这项工作中，开发了一种受控热压缩（TC）键合工艺，以解决在有机基板（层压板）上组装大型三维（3D）集成电路（IC）芯片时中间层和层压板翘曲引起的问题。通过使用TC键合，一个带有硅通孔（TSV）的薄中间层连接到顶模上，同时通过真空和垂直压力保持平面。开发了一种真空分布板，用于减轻3D组装过程中的翘曲。开发了一套独特的工艺参数，可以将严重弯曲的大面积中间层连接到半导体芯片上，而不会发生C4（受控折叠芯片连接）短路。在此工作中开发的受控TC键合方法在连接多个大型翘曲模具时具有巨大的优势。本次评估使用了一个大型22 nm CMOS顶晶片，该顶晶片具有超低k （ULK）后端线（BEOL）和61 μm和131 μm两种不同间距尺寸的铜柱/SnAg焊点。上模和中间模均大于600 mm2，有机衬底尺寸为68.5 mm × 68.5 mm。采用改进的TC键合工艺参数对顶模和中间层进行了键合。三维组装的横截面分析表明，沿芯片周长的焊点连接良好，焊料润湿性好，无焊料桥接。非破坏性x射线分析也证实，在整个芯片区域没有C4肿块桥接。实验结果验证了增强的TC键合工艺可以有效地防止C4碰撞桥接和C4碰撞电打开，从而有效地防止了大面积高翘曲硅中间层以3D结构封装的大型模具。
In this work, a controlled thermo-compression (TC) bonding process has been developed to address problems caused by interposer and laminate warpage when assembling large three-dimensional (3D) integrated circuit (IC) die on an organic substrate (laminate). By using TC bonding, a thin interposer with through-silicon-vias (TSV) is joined to a top die while being held flat by vacuum and vertical pressure. A vacuum distribution plate is developed and used to mitigate warpage during 3D assembly. A unique set of process parameters has been developed which enables the joining of severely bowed, large area interposers to a semiconductor die without C4 (Controlled Collapse Chip Connection) shorting. The controlled TC bonding method developed in this work offers a huge advantage when joining multiple large warped die in a stack. This evaluation used a large 22 nm CMOS top die with ultra low-K (ULK) back end of the line (BEOL) and copper pillar/SnAg solder bumps at two different pitch sizes, 61 μm and 131 μm. Both the top die and interposer die were larger than 600 mm2 while the organic substrate was 68.5 mm × 68.5 mm. The top die and interposer were bonded with parameters developed for an enhanced TC bonding process. Cross-sectional analysis of the 3D assembly showed that the solder joints along the perimeter of chips exhibited good joining with good solder wettability and no solder bridging. Non-destructive X-ray analysis also confirmed that there were no C4 bump bridging across the entire chip area. The experimental results verified that the enhanced TC bonding process can effectively prevent C4 bump bridging and C4 bump electrical opens for a large die packaged in a 3D configuration with a highly warped large area silicon interposer.