Implementing ASIC/memory integration by system-on-package
Implementing ASIC/memory integration by system-on-package
复制标题
通过系统级封装实现 ASIC/存储器集成
DOI：
10.1109/6144.974954
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发表时间：
2001
影响因子：
--
通讯作者：
K. Tseng
中科院分区：
文献类型：
--
作者：
R. Tsai;R. Lu;C. Lin;S. Chen;F. Tsai;K. Tseng
集成了嵌入式数据输出（EDO）存储器芯片的专用集成电路（ASIC）芯片的系统级封装（SOP）解决方案已经实现。这两款芯片均组装成新的外形，看起来像标准塑料球栅阵列 (PBGA)，具有 90 个球和 1.27 毫米球距。总体而言，与等效印刷电路板实现相比，尺寸减小了约 60%。其他好处包括简化电路板设计和降低材料成本。装配过程被表达以表明该封装是如何制造的。进行了可靠性分析，例如：预调节、温度循环测试 (TCT) 和压力烹饪测试 (PCT)。
A system-on-package (SOP) solution of an application specific integrated circuit (ASIC) chip integrating with an embedded data output (EDO) memory die has been realized. Both chips are assembled into a new form factor that appears as a standard plastic ball grid array (PBGA) with 90 balls and 1.27 mm ball pitch. Topically, size reduction of approximately 60% over the equivalent printed circuit board implementation is achieved. Other benefits include simplified board design and reduction in material cost. Assembly processes are expressed to indicate how this package is made. Reliability analyzes such as: pre-conditioning, temperature cycle test (TCT), and pressure cook test (PCT), are conducted.