BBB: Simplifying Persistent Programming using Battery-Backed Buffers

BBB: Simplifying Persistent Programming using Battery-Backed Buffers
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DOI:
10.1109/hpca51647.2021.00019
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发表时间:
2021-02
期刊:
2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
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通讯作者:
Mohammad A. Alshboul;Prakash Ramrakhyani;William Wang;James Tuck;Yan Solihin
Mohammad A. Alshboul;Prakash Ramrakhyani;William Wang;James Tuck;Yan Solihin
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作者:
Mohammad A. Alshboul;Prakash Ramrakhyani;William Wang;James Tuck;Yan Solihin

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非易失性存储器(NVM)准备增加或取代DRAM作为主存储器。通过正确的抽象和支持,非易失性主内存(NVMM)可以为存储系统提供替代方案,以托管持久的持久数据。然而,在内存中保持持久数据需要编写程序,使得数据是崩溃一致的(即它可以在故障后恢复)。支持崩溃恢复的关键是保证存储在程序顺序方面变得持久时的顺序。严格持久化要求持久化顺序与程序存储顺序一致,简单直观,但通常被认为太慢。更宽松的持久化模型是可用的,但需要更高的编程复杂性,例如,他们需要程序员正确地插入持久化barrier在他们的program.We确定严格持久化效率低下的来源之间的差距的可见性(PoV),这是该高速缓存,和持久化点(PoP),这是内存的差距。在本文中,我们提出了一种新的方法来缩小PoV/PoP差距,我们称之为电池支持的缓冲区(BBB)。BBB的关键思想是在每个内核中提供一个电池支持的持久化缓冲区(bbPB),紧挨着L1数据缓存(L1 D)。存储值在写入缓存时在bbPB中分配,成为持久性域的一部分。如果发生崩溃,电池可确保bbPB完全耗尽到NVMM。BBB简化了持久化编程,因为程序员不需要插入持久化屏障或刷新。此外,我们的BBB设计在性能和NVMM写入次数方面实现了与eADR几乎相同的结果,同时需要两个数量级的能量和时间消耗。
Non-volatile memory (NVM) is poised to augment or replace DRAM as main memory. With the right abstraction and support, non-volatile main memory (NVMM) can provide an alternative to the storage system to host long-lasting persistent data. However, keeping persistent data in memory requires programs to be written such that data is crash consistent (i.e. it can be recovered after failure). Critical to supporting crash recovery is the guarantee of ordering of when stores become durable with respect to program order. Strict persistency, which requires persist order to coincide with program order of stores, is simple and intuitive but generally thought to be too slow. More relaxed persistency models are available but demand higher programming complexity, e.g. they require the programmer to insert persist barriers correctly in their program.We identify the source of strict persistency inefficiency as the gap between the point of visibility (PoV) which is the cache, and the point of persistency (PoP) which is the memory. In this paper, we propose a new approach to close the PoV/PoP gap which we refer to as Battery-Backed Buffer (BBB). The key idea of BBB is to provide a battery-backed persist buffer (bbPB) in each core next to the L1 data cache (L1D). A store value is allocated in the bbPB as it is written to cache, becoming part of the persistence domain. If a crash occurs, battery ensures bbPB can be fully drained to NVMM. BBB simplifies persistent programming as the programmer does not need to insert persist barriers or flushes. Furthermore, our BBB design achieves nearly identical results to eADR in terms of performance and number of NVMM writes, while requiring two orders of magnitude smaller energy and time to drain.