Frequent loop detection using efficient nonintrusive on-chip hardware
Frequent loop detection using efficient nonintrusive on-chip hardware
复制标题
使用高效的非侵入式片上硬件进行频繁的环路检测
DOI：
10.1109/tc.2005.165
复制
发表时间：
2005
影响因子：
3.7
通讯作者：
F. Vahid
中科院分区：
文献类型：
--
作者：
A. Gordon;F. Vahid
为了提高软件的性能和能力，动态软件优化方法变得越来越流行。动态优化的第一步是检测频繁执行的代码或“关键区域”。以前的大多数关键区域检测器都针对台式机处理器。我们介绍了一种针对嵌入式处理器的临界区检测器，其独特的特征是非常大的尺寸和功率效率，并且完全不干扰软件的执行-这些特征是对时间敏感的嵌入式系统所需的。我们的检测器不仅找到关键区域，还确定它们的相对频率，这是在可选的动态优化方法中进行选择的潜在重要特征。我们的检测器使用了一种微小的缓存式结构，并结合了少量的逻辑。我们提供了对19个嵌入式系统基准测试的广泛探索结果。我们表明，只需0.02%的功率开销、可接受的大小开销和零运行时开销，就可以获得高精度的结果。我们的检测器目前被用作动态硬件/软件分区方法的一部分，但适用于各种情况。
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting frequently executed code, or "critical regions." Most previous critical region detectors have been targeted to desktop processors. We introduce a critical region detector targeted to embedded processors, with the unique features of being very size and power efficient and being completely nonintrusive to the software's execution-features needed in timing-sensitive embedded systems. Our detector not only finds the critical regions, but also determines their relative frequencies, a potentially important feature for selecting among alternative dynamic optimization methods. Our detector uses a tiny cache-like structure coupled with a small amount of logic. We provide results of extensive explorations across 19 embedded system benchmarks. We show that highly accurate results can be achieved with only a 0.02 percent power overhead, acceptable size overhead; and zero runtime overhead. Our detector is currently being used as part of a dynamic hardware/software partitioning approach, but is applicable to a wide variety of situations.