Measuring and modeling on-chip interconnect power on real hardware

Measuring and modeling on-chip interconnect power on real hardware
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在真实硬件上测量和建模片上互连功率

DOI:
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发表时间:
2016
期刊:
IEEE International Symposium on Workload Characterization
影响因子:
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通讯作者:
Wu
Wu
中科院分区:
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文献类型:
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作者:
Vignesh Adhinarayanan;Indrani Paul;J. Greathouse;Wei Huang;Ashutosh Pattnaik;Wu

文献摘要

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片上数据移动是现代处理器功耗的主要来源,未来的技术节点将加剧这一问题。正确理解应用程序移动数据的能力对于发明缓解策略至关重要。先前的研究将数据移动能量(在芯片上移动信息所需的能量)与数据访问能量(用于读取或写入片上存储器)相结合。这种组合可以隐藏问题的严重性,因为存储器和互连将根据未来的技术节点进行不同的扩展。因此,提高我们能量测量的保真度是最重要的问题。我们建议使用物理数据移动距离作为一种机制,从访问能量分离运动能量。然后,我们使用这种机制来设计微基准测试,以确定数据移动能量在一个真实的现代处理器。使用这些微基准测试,我们研究了影响互连功率的以下参数:(i)距离,(ii)互连带宽,(iii)切换率,以及(iv)电压和频率。我们对采用28纳米技术的AMD GPU进行了研究,并根据能量/位/毫米的工业估计验证了我们的结果。然后,我们构建了一个经验模型的基础上,我们的表征,并用它来评估22个现实世界的应用程序的互连功率。我们发现,在某些应用中,高达14%的动态功率可以消耗的互连,并提出了一系列的缓解策略。
On-chip data movement is a major source of power consumption in modern processors, and future technology nodes will exacerbate this problem. Properly understanding the power that applications expend moving data is vital for inventing mitigation strategies. Previous studies combined data movement energy, which is required to move information across the chip, with data access energy, which is used to read or write onchip memories. This combination can hide the severity of the problem, as memories and interconnects will scale differently to future technology nodes. Thus, increasing the fidelity of our energy measurements is of paramount concern. We propose to use physical data movement distance as a mechanism for separating movement energy from access energy. We then use this mechanism to design microbenchmarks to ascertain data movement energy on a real modern processor. Using these microbenchmarks, we study the following parameters that affect interconnect power: (i) distance, (ii) interconnect bandwidth, (iii) toggle rate, and (iv) voltage and frequency. We conduct our study on an AMD GPU built in 28nm technology and validate our results against industrial estimates for energy/bit/millimeter. We then construct an empirical model based on our characterization and use it to evaluate the interconnect power of 22 real-world applications. We show that up to 14% of the dynamic power in some applications can be consumed by the interconnect and present a range of mitigation strategies.