A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS
A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS
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DOI：
10.1109/tcsi.2023.3326351
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发表时间：
2024-02
期刊：
影响因子：
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通讯作者：
Yueduo Liu;Zihao Zhu;Rongxin Bao;Jiahui Lin;Jun Yin;Qiang Li;Pui-in Mak;Shiheng Yang
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文献类型：
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作者：
Yueduo Liu;Zihao Zhu;Rongxin Bao;Jiahui Lin;Jun Yin;Qiang Li;Pui-in Mak;Shiheng Yang
This work presents a compact and power-efficient kHz-range relaxation (RC) oscillator with robust performance against temperature and voltage variations. By deliberately introducing a negative-offset voltage into the comparator, an offset cancellation scheme leveraging chopping and piecewise charge-acceleration facilitates a low temperature coefficient. A low-power comparator with a tail resistor and a low oscillation amplitude improves the energy efficiency. The die area is compact by introducing leakage-based temperature compensation that eliminates bulky resistors and complex calibration. Prototyped in a 28-nm CMOS process and measured at 28.5 kHz, our oscillator occupies 0.0046 mm2 and dissipates 27.6 nW at a 0.8-V supply. The energy efficiency is 0.97 nW/kHz, and the temperature coefficient is 33.3 ppm/°C over −40 to 85 °C with 1-point calibration. The corresponding FoM of 164.9 dB compares favorably with the recent arts. The start-up time is rapid, and the period settling time is within one cycle of $\sim 5.7 \mu \text{s}$ . The Allan deviation is $\le 40$ ppm for measurement intervals of $>$ 0.5 s.
