Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures
Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures
复制标题
用于节能大型缓存架构的自适应基于时间的编码
DOI：
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
M. N. Bojnordi
中科院分区：
文献类型：
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作者：
Payman Behnam;N. Sedaghati;M. N. Bojnordi
要求更大的内存空间和严重依赖数据局部性，使得末级缓存(LLC)成为现代计算机系统总能耗的主要贡献者。因此，已经提出了许多技术来通过低功率互连、节能信令和功率感知数据编码来降低LLC中的功耗。已被证明在降低高速缓存互连中的动态功率方面成功的一种这样的技术是基于时间的数据编码，其用线路上的后续脉冲之间经过的时间来表示数据。遗憾的是，基于时间的数据表示导致每个块传输的传输延迟过大，从而降低了存储器密集型应用的能量效率。本文提出了一种新的自适应机制，该机制在运行时监控每个应用的特性，并智能地将基于时间的代码用于LLC互连，从而在节省大量能量的同时，缓解了基于时间的代码中较长传输延迟的各种影响。实现了两种自适应机制来监控1)应用阶段和2)内存突发。在一组四核系统上的12个内存密集型并行应用上的实验结果表明，所提出的编码机制可以使系统性能平均提高9%，从而使系统能效平均提高7%。此外，所提出的硬件控制器消耗的面积不到4MB LLC的1%。
Demanding larger memory footprint and relying heavily on data locality has made last-level cache (LLC) a major contributor to overall energy consumption in modern computer systems. As a result, numerous techniques have been proposed to reduce power dissipation in LLCs via low power interconnects, energy-efficient signaling, and power-aware data encoding. One such technique that has proven successful at lowering dynamic power in cache interconnects is time-based data encoding that represents data with the time elapsed between subsequent pulses on a wire. Regrettably, a time-based data representation induces excessive transmission delay per every block transfer, thereby degrading the energy efficiency of memory intensive applications. This paper presents a novel adaptive mechanism that monitors characteristics of every application at runtime and intelligently uses time-based codes for LLC interconnects, thereby alleviating the diverse impact of longer transmission delay in time-based codes while still saving significant energy. Two adaptation approaches are realized for the proposed mechanism to monitor 1) application phases and 2) memory bursts. Experimental results on a set of 12 memory intensive parallel applications on a quad-core system indicate that the proposed encoding mechanism can improve system performance by an average of 9%, which results in improving the system energy-efficiency by 7% on average. Moreover, the proposed hardware controller consumes less than 1% area of a 4MB LLC.