Digital Correction of Mismatches in Time-Interleaved ADCs for Digital-RF Receivers
Digital Correction of Mismatches in Time-Interleaved ADCs for Digital-RF Receivers
复制标题
数字 RF 接收器的时间交错 ADC 失配的数字校正
DOI：
10.1109/icecs.2017.8292022
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
Tsutomu Yoshimura
中科院分区：
文献类型：
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作者：
Tomoya Takahashi;Takao Kihara;Tsutomu Yoshimura
时间交错模数转换器（ADC）降低了一个ADC所需的采样率，以实现每秒千兆样本（GS/s）的速率。ADC之间的增益和时序不匹配会产生混叠信号，降低了时间交错ADC （TI-ADC）的无杂散动态范围。传统的ti - adc数字校正方法还没有考虑到直接射频采样接收器的应用。提出了一种针对接收机中m通道ti - adc的数字校正方法。该方法在接收机中采用同相/正交相（I/Q）下变频混频器和级联积分器梳状（CIC）滤波器。这使得校正电路（除失配估计外）比传统方法具有更少的构建块：一个加法器，一个乘法器，没有滤波器。仿真和测量结果表明，所提出的方法完全降低了4路和2路12位ti - adc噪声本底以下的混叠信号。
Time-interleaving analog-to-digital converters (ADCs) decreases the required sampling rate for one ADC to achieve gigasamples per second (GS/s) rates. The gain and timing mismatches among the ADCs generate aliasing signals, degrading the spurious-free dynamic range of the time-interleaved ADC (TI-ADC). The conventional digital correction methods for TI-ADCs have not considered application to direct-RF sampling receivers. We present a digital correction method for M-channel TI-ADCs in the receivers. The proposed method employs in-phase/quadrature-phase (I/Q) downconversion mixers and cascaded integrator-comb (CIC) filters in the receiver. This allows the correction circuit (except for mismatch estimation) to have fewer building blocks than the conventional methods: one adder, one multiplier, and no filter. Simulations and measurements show that the proposed method completely reduces the aliasing signals below the noise floor of 4- and 2-channel 12-bit TI-ADCs, respectively.