Readout Firmware of the Vertex Locator for LHCb Run 3 and Beyond
Readout Firmware of the Vertex Locator for LHCb Run 3 and Beyond
复制标题
LHCb Run 3 及更高版本的顶点定位器读出固件
DOI:
10.1109/tns.2021.3085018
复制
发表时间:
2021
影响因子:
1.8
通讯作者:
Hennessy K
中科院分区:
文献类型:
--
作者:
Hennessy K
The new LHCb Vertex Locator (VELO) for LHCb, comprising a new pixel detector and readout electronics, will be installed in 2021 for data taking in Run 3 at the LHC. The electronics centers around the “VeloPix” ASIC at the front-end operating in a trigger-less readout at 40MHz. A custom serializer, called gigabit wireline transmitter (GWT), and associated custom protocol have been designed for the VeloPix. The GWT data are sent from the serializers of the VeloPix at a line rate of 5.12 Gb/s, reaching a total data rate of 2–3 Tb/s for the full VELO detector. Data are sent over 300-m optic-fiber links to the control and readout electronics cards for deserialization and processing in Intel Arria 10 FPGAs. Because of the VeloPix trigger-less design, latency variances up to 12can occur between adjacent datagrams. It is therefore essential to buffer and synchronize the data in firmware prior to onward propagation or suffer a huge CPU-processing penalty. This article will describe the architecture of the readout firmware in detail with focus given to the resynchronization mechanism and techniques for cauterization. Issues found during readout commissioning, and scaling resource utilization, along with the their solutions, will be illustrated. The latest results of the firmware data-processing chain can be presented as well as the verification procedures employed in simulation. Challenges for the next generation of the detector will also be presented with ideas for a readout processing solution.