Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter
Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter
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DOI：
10.1109/tcsi.2014.2312476
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发表时间：
2014-04
期刊：
影响因子：
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通讯作者：
Zhicheng Lin;Pui-in Mak;R. Martins
中科院分区：
文献类型：
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作者：
Zhicheng Lin;Pui-in Mak;R. Martins
研究了N路开关电容（SC）分支由N相非重叠本振（LO）驱动，等效为一个适用于射频（RF）滤波的可调谐并联RLC谐振回路。本文提出了一种增益增强的N通道SC带通滤波器（GB-BPF）与一些寻求的功能。它基于一个带N路SC分支的前置放大器（Gm）作为反馈网络，提供：1）在Gm的输入和输出处一步实现双重RF滤波; 2）定制通带增益和带宽，输入阻抗匹配; 3）Gm提供的环路增益降低了物理电容。所有已被检查使用的SC分支的RLC模型，然后应用线性周期性时变（LPTV）分析，推导出的R，L和C的表达式和分析研究的谐波选择性，谐波折叠，和噪声。后者表明：1）开关引起的噪声在输出端被陷波，从而允许较小的开关节省LO功率，以及2）源电阻和Gm引起的噪声在输出端是窄带的，从而减少谐波混频期间的折叠噪声。为了研究电路非理想性的影响，一个直观的等效电路模型也提出和验证。设计实例是用65 nm CMOS模拟的四路0.5-2 GHz GB-BPF。它具有>11 dB增益、2.3 dB NF和+21 dBm带外IIP 3（150 MHz失调），功耗仅为7 mW。
It has been studied that, an N-path switched-capacitor (SC) branch driven by an N-phase non-overlapped local oscillator (LO), is equivalent to a tunable parallel-RLC tank suitable for radio-frequency (RF) filtering. This paper proposes a gain-boosted N-path SC bandpass filter (GB-BPF) with a number of sought features. It is based on a transconductance amplifier (Gm) with an N-path SC branch as its feedback network, offering: 1) double RF filtering at the input and output of the Gm in one step; 2) customized passband gain and bandwidth with input-impedance match; and 3) reduced physical capacitance thanks to the loop gain offered by Gm. All have been examined using a RLC model of the SC branch before applying the linear periodically time-variant (LPTV) analysis to derive the R, L, and C expressions and analytically study the harmonic selectivity, harmonic folding, and noise. The latter reveals that: 1) the noise due to the switches is notched at the output, allowing smaller switches to save the LO power and 2) the noises due to the source resistance and Gm are narrowband at the output, reducing the folded noise during harmonic mixing. To study the influence of circuit non-idealities, an intuitive equivalent circuit model is also proposed and verified. The design example is a four-path 0.5-2-GHz GB-BPF simulated with the 65-nm CMOS. It exhibits >11 dB gain, 2.3 dB NF, and +21-dBm out-of-band IIP3 at 150-MHz offset, while consuming just 7 mW of power.