Interconnect characterization using time-domain reflectometry
Interconnect characterization using time-domain reflectometry
复制标题
使用时域反射计进行互连表征
DOI：
10.1109/22.414553
复制
发表时间：
1995
影响因子：
4.3
通讯作者：
A. Yang
中科院分区：
文献类型：
--
作者：
S. Corey;A. Yang
提出了一种基于时域反射测量数据的板级、封装级和多芯片模块基板级互连电路建模方法。提取多端口系统的散射极点和残差，并将其用作可以在基于SPICE的模拟器中通过递归卷积在线性时间内进行评估的模型。这允许任何线性或非线性电路连接到模型端口，并且整个电路可以在基于SPICE的仿真器中进行仿真。两端口和四端口的例子微带电路的特点，并与实测数据的仿真结果进行了比较。延迟，反射，传输和串扰被证明是准确地建模在每种情况下。>
An approach is presented for modeling board-level, package-level, and multichip module substrate-level interconnect circuitry based on measured time-domain reflectrometry data. The scattering poles and residues of a multiport system are extracted and used as a model that can be evaluated in linear time by recursive convolution in a SPICE-based simulator. This allows any linear or nonlinear circuits to be connected to the model ports, and the entire circuit may be simulated in in a SPICE-based simulator. Two-port and four-port example microstrip circuits are characterized, and the simulation results are compared with measured data. Delay, reflection, transmission, and crosstalk are shown to be accurately modeled in each case. >