From Chip to Cooling Tower Data Center Modeling: Chip Leakage Power and Its Impact on Cooling Infrastructure Energy Efficiency
From Chip to Cooling Tower Data Center Modeling: Chip Leakage Power and Its Impact on Cooling Infrastructure Energy Efficiency
复制标题
从芯片到冷却塔数据中心建模：芯片泄漏功率及其对冷却基础设施能效的影响
DOI：
--
复制
发表时间：
2012
期刊：
影响因子：
--
通讯作者：
T. Cader
中科院分区：
文献类型：
--
作者：
T. J. Breen;E. Walsh;J. Punch;Amip Shah;C. Bash;N. Kumari;T. Cader
众所周知，芯片封装的功耗随工作温度而变化，与工作负载处理能力无关。这种变化通常被称为芯片泄漏功率，通常占芯片总功耗的~10%。工作温度对泄漏功耗的影响是信息技术（IT）行业设计优化的主要关注点，IT系统功率密度正在稳步增加，随着封装尺寸的缩小，泄漏功率预计将在不久的将来占芯片功率的50%左右。从简单的线性模型到复杂的超线性模型，芯片泄漏功率随封装温度变化的模型一直受到人们的关注。这些知识对于IT系统设计人员提高芯片级能源效率和最小化散热至关重要。然而，这些工作主要集中在元器件层面，很少考虑芯片泄漏功率对整个数据中心效率的影响。数据中心功耗的研究将IT系统的散热作为一个恒定值，而不考虑由于泄漏功率导致的芯片功率随工作温度的变化。以前的建模技术也忽略了这种温度依赖关系。本文讨论了将芯片泄漏功率纳入数据中心整体性能分析的必要性。定义了一种芯片泄漏功率模型，并讨论了在现有的多尺度数据中心能量模型中的实现。参数研究在一系列系统和环境运行条件下进行，以评估不同程度的芯片泄漏功率的影响。本研究也说明了减轻泄漏功率影响的可能策略。这项工作表明，当在数据中心模型中包括芯片泄漏功率时，在提高工作温度以提高冷却基础设施效率与在更高工作温度下由于泄漏功率而增加热负荷之间存在折衷。
The power consumption of the chip package is known to vary with operating temperature, independently of the workload processing power. This variation is commonly known as chip leakage power, typically accounting for ~10% of total chip power consumption. The influence of operating temperature on leakage power consumption is a major concern for the information technology (IT) industry for design optimization where IT system power densities are steadily increasing and leakage power expected to account for up to ~50% of chip power in the near future associated with the reducing package size. Much attention has been placed on developing models of the chip leakage power as a function of package temperature, ranging from simple linear models to complex super-linear models. This knowledge is crucial for IT system designers to improve chip level energy efficiency and minimize heat dissipation. However, this work has been focused on the component level with little thought given to the impact of chip leakage power on entire data center efficiency. Studies on data center power consumption quote IT system heat dissipation as a constant value without accounting for the variance of chip power with operating temperature due to leakage power. Previous modeling techniques have also omitted this temperature dependent relationship. In this paper, we discuss the need for chip leakage power to be included in the analysis of holistic data center performance. A chip leakage power model is defined and its implementation into an existing multiscale data center energy model is discussed. Parametric studies are conducted over a range of system and environment operating conditions to evaluate the impact of varying degrees of chip leakage power. Possible strategies for mitigating the impact of leakage power are also illustrated in this study. This work illustrates that when including chip leakage power in the data center model, a compromise exists between increasing operating temperatures to improve cooling infrastructure efficiency and the increase in heat load at higher operating temperatures due to leakage power.