A Sub-mW Fractional- ${N}$ ADPLL With FOM of −246 dB for IoT Applications
A Sub-mW Fractional- ${N}$ ADPLL With FOM of −246 dB for IoT Applications
复制标题
适用于物联网应用且 FOM 为 −246 dB 的亚毫瓦级 ${N}$ ADPLL
DOI：
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发表时间：
2018
影响因子：
5.4
通讯作者：
K. Okada
中科院分区：
文献类型：
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作者：
Hanli Liu;Dexian Tang;Zheng Sun;W. Deng;H. Ngo;K. Okada
本文提出了一种具有可扩展功耗的亚毫瓦分数公式式全数字锁相环，其品质因数为−246db。所提出的10位超低功耗隔离式恒斜率数模转换器在52 MS/S下的分辨率为580 fS，测量的积分非线性度为870 fS，功耗为0.14 mW。采用带增益校准的窄范围时间放大器(TA)-时间/数字转换器(TDC)可使带内相位噪声退化和环路带宽变化最小化。此外，引入了具有死区功能的粗略数字锁相环，它在13 MHz的频率误差下将锁相时间减少到4.2tt；内联公式>；；tex-ath notation=“LaTeX”>；$MUT EXT{S}$<；/tex-数学&>；/内联-公式&>t；。粗略数字锁相环在后台监控较大的频率和相位跳变，而功耗几乎为零。在超低功耗模式下，建议的分数直插式ADPLL的功耗为0.65 mW，参考频率为26 MHz。采用−242dBFOM，获得了1.00ps的均方根抖动和−50dBc的带内分数杂散。在高性能模式下，采用参考倍频器，抖动和杂散可分别提高到fS和−56dBc，而功耗为0.98dBc。提出的ADPLL具有可扩展的功率和抖动性能，可以用于物联网(IoT)应用，如蓝牙低能量(BLE)和Wi-Fi网络。
This paper presents a sub-mW fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula> all-digital phase-locked loop (ADPLL) with scalable power consumption, which achieves an figure of merit (FOM) of −246 dB. The proposed 10-b ultralow-power isolated constant-slope digital-to-time converter (DTC) achieves a 580-fs resolution and a measured integral nonlinearity (INL) of 870 fs with 0.14-mW power consumption at 52 MS/s. A narrow-range time amplifier (TA)-time-to-digital converter (TDC) with gain calibration minimizes both the in-band phase noise degradation and the loop-bandwidth variation. In addition, a coarse-DPLL is introduced with dead-zone function, which reduces the phase lock time to 4.2 <inline-formula> <tex-math notation="LaTeX">$mu ext{s}$ </tex-math></inline-formula> at a 13-MHz frequency error. The coarse-DPLL monitors large frequency and phase jump in the background while consuming almost zero power. In an ultralow power mode, the proposed fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula> ADPLL consumes a 0.65-mW power with a 26-MHz reference. A rms jitter of 1.00 ps and −50-dBc in-band fractional spur are achieved with a −242-dB FOM. In high-performance mode, a reference doubler is utilized, the jitter and spurs can be improved to 535 fs and −56 dBc, respectively, while consuming 0.98 mW. The proposed ADPLL with scalable power and jitter performance can be utilized for Internet-of-Things (IoT) applications, such as Bluetooth low energy (BLE) and Wi-Fi networks.