Improved Model on Buried-Oxide Damage Induced by Total-Ionizing-Dose Effect for HV SOI LDMOS
Improved Model on Buried-Oxide Damage Induced by Total-Ionizing-Dose Effect for HV SOI LDMOS
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DOI：
10.1109/ted.2020.3045378
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发表时间：
2021-04
影响因子：
3.1
通讯作者：
Zhangyi’an Yuan;M. Qiao;Xinjian Li;Dican Hou;Shuhao Zhang;Xin Zhou;Zhaoji Li;Bo Zhang-
中科院分区：
文献类型：
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作者：
Zhangyi’an Yuan;M. Qiao;Xinjian Li;Dican Hou;Shuhao Zhang;Xin Zhou;Zhaoji Li;Bo Zhang-
本文提出了一种改进的总电离剂量(TID)效应引起的埋氧层(BOX)损伤模型，该模型考虑了SOI/BOX界面在负电场偏置(垂直于SOI/BOX界面的垂直于BOX界面的场线自上而下)下产生的正氧化物陷阱电荷(${N}\TEXT{ot}}$)和${N}{\TEXT{ot}}$饱和效应，并用于精确的模拟分析。此外，本文提出的精确模拟方法还揭示了高压SOI横向双扩散金属氧化物半导体场效应晶体管(LDMOS)在辐照过程中退化的机理。利用该模型对抗辐射高压SOI LDMOS的容差设计进行了讨论。为了满足辐射加固的要求，应考虑辐射后的电特性和新鲜的电特性之间的权衡。本文介绍的抗辐射设计LDMOS，在工作电压为80V的条件下，工作电压为80V，关态击穿电压保持在120V以上，工作电压为80V。给出了相应的强化策略。
In this article, an improved model on buried-oxide (BOX) damage induced by total-ionizing-dose (TID) effect considering positive oxide trapped charge ( ${N}_{\text {ot}}$ ) generated in silicon on insulator (SOI) /BOX interface under negative electric field bias (field lines perpendicular to the SOI/BOX interface pointing from the top to the bottom of the BOX) and ${N}_{\text {ot}}$ saturation effect is proposed and adopted in accurate simulated analysis to predict the postirradiation device behavior. Moreover, the mechanism of high-voltage (HV) SOI lateral double diffused metal oxide semiconductor field effect transistor (LDMOS) degradation during irradiation is also revealed by the proposed accurate simulation method. Tolerance design for radiation-hardened HV SOI LDMOS is discussed with the aid of the presented model. The tradeoff between postirradiation electrical characteristics and fresh electrical characteristics should be taken into account to meet the radiation hardening requirement. The radiation-hardened-by-design LDMOS introduced in this article keeps an OFF-state breakdown voltage above 120 V at ${D} = {500}$ krad(Si) with operating voltage equal to 80 V, which is fabricated on a commercial SOI substrate material with plain interface quality parameters. The corresponding hardening strategy is also given.