A low-power delta-sigma modulator using dynamic-source-follower integrators

A low-power delta-sigma modulator using dynamic-source-follower integrators
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DOI：
10.1109/icecs.2010.5724571
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发表时间：
2010-12
期刊：
2010 17th IEEE International Conference on Electronics, Circuits and Systems
影响因子：
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通讯作者：
Ryoto Yaguchi;F. Adachi;T. Waho
Ryoto Yaguchi;F. Adachi;T. Waho
中科院分区：
其他
文献类型：
--
作者：
Ryoto Yaguchi;F. Adachi;T. Waho

文献摘要

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提出了一种基于动态源跟随放大器的新型低功耗开关电容积分器，并将其应用于二阶ΔΣ调制器。采用0.18µm CMOS工艺的电路仿真表明，与传统的运放积分器相比，该积分器可以显著降低功耗。在带宽和SNDR分别为20 kHz和73.8dB的情况下，预测了0.172 pJ/conv·step的品质因数（FOM）。
A novel low-power switched-capacitor integrator based on dynamic-source-follower amplifiers is proposed and applied to a 2nd-order ΔΣ modulator. Circuit simulation assuming 0.18-µm CMOS technology shows that the present integrator can drastically reduce the power dissipation compared with conventional op-amp-based integrators. A figure-of-merit (FOM) of 0.172 pJ/conv·step has been predicted with a bandwidth and an SNDR of 20 kHz and 73.8dB, respectively.