Bamboo ECC: Strong, safe, and flexible codes for reliable computer memory
Bamboo ECC: Strong, safe, and flexible codes for reliable computer memory
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DOI：
10.1109/hpca.2015.7056025
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发表时间：
2015-03
期刊：
影响因子：
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通讯作者：
Jungrae Kim;Michael B. Sullivan;M. Erez
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文献类型：
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作者：
Jungrae Kim;Michael B. Sullivan;M. Erez
不断增长的计算机系统规模和集成水平已经使存储器可靠性成为主要关注点，需要强大的存储器错误保护。因此，大规模系统通常采用错误检查和纠错码来交换冗余存储和带宽以提高可靠性。虽然将来需要更强的存储器保护来满足可靠性目标，但不希望进一步增加用于冗余的存储量和带宽。我们提出了一个新的家庭的单层ECC机制，称为竹ECC，同时解决冲突的要求，提高可靠性，同时保持或减少错误保护开销。相对于最先进的单层错误保护，Bamboo ECC码具有上级纠正能力，几乎消除了无声数据损坏的风险，并且还可以在细粒度上增加冗余，从而实现更自适应的优雅降级方案。这些强度、安全性和灵活性优势转化为更可靠的存储系统。为了证明这一点，我们评估了一个家庭的竹ECC组织的背景下，传统的72 b和144 b DRAM通道，并显示显着的错误覆盖率和内存寿命的改善竹ECC相对于现有的SEC-DED，芯片正确和双芯片正确的计划。
Growing computer system sizes and levels of integration have made memory reliability a primary concern, necessitating strong memory error protection. As such, large-scale systems typically employ error checking and correcting codes to trade redundant storage and bandwidth for increased reliability. While stronger memory protection will be needed to meet reliability targets in the future, it is undesirable to further increase the amount of storage and bandwidth spent on redundancy. We propose a novel family of single-tier ECC mechanisms called Bamboo ECC to simultaneously address the conflicting requirements of increasing reliability while maintaining or decreasing error protection overheads. Relative to the state-of-the-art single-tier error protection, Bamboo ECC codes have superior correction capabilities, all but eliminate the risk of silent data corruption, and can also increase redundancy at a fine granularity, enabling more adaptive graceful downgrade schemes. These strength, safety, and flexibility advantages translate to a significantly more reliable memory system. To demonstrate this, we evaluate a family of Bamboo ECC organizations in the context of conventional 72b and 144b DRAM channels and show the significant error coverage and memory lifespan improvements of Bamboo ECC relative to existing SEC-DED, chipkill-correct and double-chipkill-correct schemes.