Slow Trap Properties and Generation in Al2O3/GeOx/Ge MOS Interfaces Formed by Plasma Oxidation Process
Slow Trap Properties and Generation in Al2O3/GeOx/Ge MOS Interfaces Formed by Plasma Oxidation Process
复制标题
等离子体氧化工艺形成的 Al2O3/GeOx/Ge MOS 界面的慢陷阱特性和生成
DOI：
10.1021/acsaelm.8b00071
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发表时间：
2019
影响因子：
4.7
通讯作者：
Takagi Shinichi
中科院分区：
文献类型：
--
作者：
Ke Mengnan;Takenaka Mitsuru;Takagi Shinichi
为了实现具有小等效氧化层厚度（EOT）和低快界面态密度（Dit）的Ge CMOS器件，理解Ge栅堆叠中的慢陷阱并降低其密度是最关键的问题之一。为此，我们研究慢陷阱密度和位置的Al 2 O3/GeOx/Ge MOS栅堆叠，这是在这项工作中通过等离子体氧化制造。在Al_2 O_3/GeOx/Ge MOS界面中，比较了等离子体氧化前（pre-PO）和等离子体氧化后（post-PO）的慢陷阱密度。此外，还系统地评估了预PO形成的Al 2 O3/GeOx/Ge MOS栅堆叠的慢陷阱密度与GeOx和Al 2 O3厚度的关系。结果表明，在Ge的导带边缘附近，采用PO后工艺将产生额外的电子慢陷阱。首先，在Al_2 O_3/GeOx/Ge MOS与pre-PO的界面上。电子的慢陷阱主要位于GeOx/Ge界面附近，空穴的慢陷阱主要位于Al_2O_3/GeOx界面附近.
For realizing Ge CMOS devices with a small equivalent oxide thickness (EOT) and a low density of fast interface states (Dit), understanding of slow traps in Ge gate stacks and reduction of its density are one of the most crucial issues. For this purpose, we examine slow trap density and locations of Al2O3/GeOx/Ge MOS gate stacks, which are fabricated by plasma oxidation in this work. In Al2O3/GeOx/Ge MOS interfaces formed by preplasma oxidation (pre-PO) and postplasma oxidation (post-PO), slow trap density has been compared. Also, the slow trap density on the thickness dependence of GeOxand Al2O3is systematically evaluated for the Al2O3/GeOx/Ge MOS gate stacks formed by pre-PO. It is found that near the conduction band edge of Ge, additional electron slow traps will be generated by using the post-PO process. Above all, in the Al2O3/GeOx/Ge MOS interfaces with pre-PO. The main slow traps can be located near the GeOx/Ge interfaces for the electrons and the Al2O3/GeOxinterfaces for the holes, respectively.