Secure chip odometers using intentional controlled aging

Secure chip odometers using intentional controlled aging
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使用有意控制的老化保护芯片里程表

DOI:
10.1109/hst.2018.8383898
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发表时间:
2018
期刊:
2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
影响因子:
--
通讯作者:
K. Mai
K. Mai
中科院分区:
--
文献类型:
--
作者:
N. E. C. Akkaya;B. Erbagci;K. Mai

文献摘要

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对于电子制造商、系统集成商和最终客户来说,电子产品假冒是一个日益严重的重要问题。制造供应链中假冒电子产品的普遍存在引起了国防和民用领域的重大安全问题。威胁范围从相对简单的 IC 重新标记(为了以更高的价格出售零件或回收废弃设备中的零件)到大规模逆向工程/复制设计以及克隆 IC 和系统的制造。为了打击 IC 假冒行为,我们提出了安全芯片里程计,为 IC 提供安全的使用/寿命测量和来源认证,从而能够简单、安全、可靠地区分正品和假冒零件。安全芯片里程表具有链接的二进制老化元件(BAE)来测量芯片的使用情况和寿命。在我们提出的设计中,使用热载流子注入 (HCI) 来测量寿命/使用情况的 BAE 是在 65 nm 体 CMOS 工艺中设计和流片的。出于表征目的,流片芯片具有 500 个模块化 BAE 的阵列以及具有 16 个模块化 BAE 的自老化系统。该设计的模块化为不同的应力电流和电流密度值提供了 693 种可能的组合。测试芯片尺寸为1.2mm x 1.7mm,有78个焊盘,每个模块化BAE面积为52.5μm2。在 2.5V 标称应力电压下,它们可以承受 40μA 至 1.3mA 范围内的电流。
Electronics counterfeiting is a significant and growing problem for electronics manufacturers, system integrators, and end customers. The widespread prevalence of counterfeit electronics in the manufacturing supply chain raises significant security concerns in both the defense and civilian sectors. The threat ranges from relatively simple IC remarking, in order to sell parts at a higher price or to recycle parts from discarded equipment, to wholesale reverse-engineering/copying of designs and manufacturing of cloned ICs and systems. To combat IC counterfeiting, we propose secure chip odometers to provide ICs with both a secure gauge of use/age and an authentication of provenance to enable simple, secure, robust differentiation between genuine and counterfeit parts. The secure chip odometers have chained binary aging elements (BAE) to measure use and age of the chip. In our proposed design, BAEs that use hot carrier injection (HCI) to measure age/use are designed and taped-out in a 65 nm bulk CMOS process. For characterization purposes, the taped-out chips have an array of 500 modular BAEs and a self-aging system with 16 modular BAEs. The modularity of the design provides 693 possible combinations for different stress current and current density values. The test chip dimensions are 1.2mm by 1.7mm with 78 pads, and each modular BAE has an area of 52.5μm2. They can be stressed with currents ranging from 40μA to 1.3mA at the 2.5V nominal stress voltage.