Leveraging Targeted Value Prediction to Unlock New Hardware Strength Reduction Potential
Leveraging Targeted Value Prediction to Unlock New Hardware Strength Reduction Potential
复制标题
利用目标值预测来释放新的硬件强度降低潜力
DOI：
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发表时间：
2021
期刊：
影响因子：
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通讯作者：
Arthur Perais
中科院分区：
文献类型：
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作者：
Arthur Perais
价值预测（VP）是一种微体系技术，在通用处理器中，推测地破坏数据依赖性，以增加可用的指令水平并行性（ILP）本文，我们通过利用执行过程中产生的值的不规则分布来重新访问和简化副总裁，我们证明了只能通过预测完整的VP基础架构带来的合理绩效提升。一些“通常的怀疑”值。重命名 - 时间优化，在有特定操作数值的情况下，在重命名时可能会在重命名时消失。
Value Prediction (VP) is a microarchitectural technique that speculatively breaks data dependencies to increase the available Instruction Level Parallelism (ILP) in general purpose processors. Despite recent proposals, VP remains expensive and has intricate interactions with several stages of the classical superscalar pipeline. In this paper, we revisit and simplify VP by leveraging the irregular distribution of the values produced during the execution of common programs. First, we demonstrate that a reasonable fraction of the performance uplift brought by a full VP infrastructure can be obtained by predicting only a few ”usual suspects” values. Furthermore, we show that doing so allows to greatly simplify VP operation as well as reduce the value predictor footprint. Lastly, we show that these Minimal and Targeted VP infrastructures conceptually enable Speculative Strength Reduction (SpSR), a rename-time optimization whereby instructions can disappear at rename in the presence of specific operand values.