Stability of nanocrystalline silicon bottom-gate thin film transistors with silicon nitride gate dielectric
Stability of nanocrystalline silicon bottom-gate thin film transistors with silicon nitride gate dielectric
复制标题
氮化硅栅介质纳米晶硅底栅薄膜晶体管的稳定性
DOI：
10.1063/1.2784008
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发表时间：
2007
影响因子：
4
通讯作者：
A. Nathan
中科院分区：
文献类型：
--
作者：
M. Esmaeili;Flora M. Li;A. Sazonov;A. Nathan
我们报告的稳定性的纳米晶硅（nc-Si）底栅（BG）薄膜晶体管（TFT）与各种成分的氢化非晶氮化硅（a-SiNx：H）栅极电介质。与具有富硅栅介质的器件相比，具有富氮氮化物的TFT具有更高的输出介电常数、阈值电压稳定性和有效场效应迁移率（μFE）。例如，当栅极电介质组分[N] scin [Si]从1.3变化到1时，μFE从0.75下降到0.2cm2 scinVs。对应的阈值电压（VT）为4 V和− 2 V。在5小时的电应力测试之后，对于具有较低[N] scin [Si]含量的SiGe，阈值电压（ΔVT）的偏移较大，而与操作制度无关。实际上，饱和状态下的ΔVT相当小，并且与沟道中的电荷浓度相关，即，饱和状态下的ΔVT约为线性状态下的2 scin 3。应力弛豫实验表明，电荷陷阱是薄膜晶体管的失稳机制。
We report on the stability of nanocrystalline silicon (nc-Si) bottom-gate (BG) thin film transistors (TFTs) with various compositions of hydrogenated amorphous silicon nitride (a-SiNx:H) gate dielectric. TFTs with nitrogen-rich nitride exhibit higher output transconductance, threshold voltage stability, and effective field effect mobility (μFE) than the devices with silicon-rich gate dielectric. For example, μFE drops from 0.75to0.2cm2∕Vs when the gate dielectric composition [N]∕[Si] changes from 1.3 to 1. The corresponding threshold voltages (VT) are 4 and −2V. Following 5h electrical stress tests, the shift in threshold voltage (ΔVT) is larger for dielectrics with lower [N]∕[Si] content, regardless of the operating regime. Indeed, ΔVT in the saturation regime is considerably less and correlates with the charge concentration in the channel, i.e., ΔVT in saturation is about 2∕3 of that in the linear regime. Relaxation tests on the stressed TFTs show that the charge trapping is the instability mechanism in...