Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study

Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study
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DOI:
10.1145/3453688.3461529
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发表时间:
2021-06
期刊:
Proceedings of the 2021 Great Lakes Symposium on VLSI
影响因子:
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通讯作者:
Shaahin Angizi;A. Roohi;M. Taheri;Deliang Fan
Shaahin Angizi;A. Roohi;M. Taheri;Deliang Fan
中科院分区:
其他
文献类型:
--
作者:
Shaahin Angizi;A. Roohi;M. Taheri;Deliang Fan

文献摘要

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内存处理(PIM)已成为解决内存墙危机的可行方案,并在加速从过滤到复杂神经网络等计算密集型人工智能应用方面引起了极大兴趣。在本文中,我们尝试利用 PIM 和残差数系统 (RNS) 来替代传统的二进制数表示法,以加速目标应用的主要操作--乘法累加 (MAC)。PIM 架构利用存储芯片的最大内部带宽实现本地并行计算,消除了片外数据传输。此外,RNS 通过对小残差独立并行执行算术运算,限制了数位间的携带传播。因此,我们开发了一种名为 PRIMS 的 PIM-RNS 系统,并分析了 PIM 架构与 RNS 运算的内在并行性相互交织的潜力,以确定机遇和挑战。为此,我们建立了一个全面的设备到体系结构评估框架,考虑到 PIM 技术对一个著名的三模态集的影响,将其作为一个案例来定量研究这个问题。
Processing-in-memory (PIM) has raised as a viable solution for the memory wall crisis and has attracted great interest in accelerating computationally intensive AI applications ranging from filtering to complex neural networks. In this paper, we try to take advantage of both PIM and the residue number system (RNS) as an alternative for the conventional binary number representation to accelerate multiplication-and-accumulations (MACs), primary operations of target applications. The PIM architecture utilizes the maximum internal bandwidth of memory chips to realize a local and parallel computation to eliminates the off-chip data transfer. Moreover, RNS limits inter-digit carry propagation by performing arithmetic operations on small residues independently and in parallel. Thus, we develop a PIM-RNS, entitled PRIMS, and analyze the potential of intertwining PIM architecture with the inherent parallelism of the RNS arithmetic to delineate the opportunities and challenges. To this end, we build a comprehensive device-to-architecture evaluation framework to quantitatively study this problem considering the impact of PIM technology for a well-known three-moduli set as a case study.