Low power adiabatic logic circuits with feedback structure using three-phase power supply
Low power adiabatic logic circuits with feedback structure using three-phase power supply
复制标题
使用三相电源的具有反馈结构的低功耗绝热逻辑电路
DOI：
10.1109/icccas.2005.1495362
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发表时间：
2005
期刊：
影响因子：
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通讯作者：
Yinshui Xia
中科院分区：
文献类型：
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作者：
Jianping Hu;Weiqiang Zhang;X. Ye;Yinshui Xia
非绝热能量损失是绝热电路中功耗的主要来源。本文提出了一种消除输出节点非绝热能量损失的方法，以实现低功耗设计。该电路的总功耗显著降低，因为传输到输出节点的能量主要通过使用下一级或当前级缓冲器的反馈控制在流水线结构中回收。验证了一个16位超前进位加法器。还提出了一种三相功率时钟发生器。HSPICE仿真结果表明，在50 ~ 200 MHz的时钟频率范围内，该加法器的功耗仅为2N-2N 2 P加法器的30%，约为PAL-2N加法器的50%.
Non-adiabatic energy loss is the main source of power consumption in adiabatic circuits. This paper presents an approach to eliminate the non-adiabatic energy loss on output nodes to realize power-efficient design. The total power consumption of the proposed circuits is significantly reduced, as the energy transferred to output nodes is mostly recovered by using feedback control from next-stage or current-stage buffer in a pipelined structure. A 16-bit carry-lookahead adder is verified. A three-phase power-clock generator is also suggested. HSPICE simulation results indicate that the proposed adder consumes only 30% of the dissipated energy of a 2N-2N2P one and is about 50 % of the dissipated energy of a PAL-2N one for clock rates ranging from 50 to 200 MHz.