Fabrication process and properties of InGaAs wires having Si interface control layers for removal of Fermi level pinning
Fabrication process and properties of InGaAs wires having Si interface control layers for removal of Fermi level pinning
复制标题
用于去除费米能级钉扎的具有Si界面控制层的InGaAs线的制造工艺和性能
DOI：
10.1016/0169-4332(92)90500-w
复制
发表时间：
1992
影响因子：
6.7
通讯作者：
H. Hasegawa
中科院分区：
文献类型：
--
作者：
H. Fujikura;H. Tomozawa;M. Akazawa;H. Hasegawa
去除表面费米能级钉扎是成功实现复合量子效应器件的关键。为了建立一种选择性分子束外延（MBE）制备InGaAs线的工艺，并研究In-Si界面控制层（ICL）对消除表面费米能级钉扎的作用，首次采用激光干涉光刻技术在InP波纹表面上选择性MBE生长In 0. 53 Ga 0. 47 As线结构，并研究了InAlAs缓冲层对线结构的影响。然后，线结构覆盖的Si ICL和厚的SiO2覆盖层。作为对比，还制备了InAlAs/InGaAs/InAlAs线结构。利用SEM、C-V和光致发光技术对结构进行了表征，确定了最佳的成线条件。结果表明，硅ICL技术对于消除InGaAs量子结构中的费米能级钉扎是有用的和有前途的。
Removal of surface Fermi level pinning is a crucial issue for successful realization of compound semiconductir quantum-effect devices. The purpose of this paper is to establish a process to fabricate InGaAs wires by selective MBE and to investigate the capability of an ultrathin Si interface control layer (ICL) on the wires in removing the surface Fermi level pinning.In0.53Ga0.47As wire structures with or without InAlAs buffer layers were fabricated for the first time by a selective MBE growth on corrugated InP surfaces formed by laser interference lithography. Then, the wire structures were covered with the Si ICL and a thick SiO2overlayer. For comparison, InAlAs/InGaAs/InAlAs wire structures were also prepared. The structures were characterized by SEM,C–Vand photoluminescence techniques.Optimum conditions for wire formations are established. It is shown that the Si ICL technique is useful and promising for removal of the Fermi level pinning in InGaAs quantum structures.