Synthesis of Multiplierless FIR Filter by Efficient Sharing of Horizontal and Vertical Common Subexpression Elimination
Synthesis of Multiplierless FIR Filter by Efficient Sharing of Horizontal and Vertical Common Subexpression Elimination
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发表时间：
2004-07
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通讯作者：
Yasuhiro Takahashi;Kazukiyo Takahashi;M. Yokoyama
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作者：
Yasuhiro Takahashi;Kazukiyo Takahashi;M. Yokoyama
本文提出了一种新的用少量加法器和寄存器实现正则符号数字（CSD）线性相位有限冲激响应滤波器的VLSI设计方法。该方法为水平和垂直公共子表达式消除技术找到正确的位模式提供了一种有效的方法。通过实例，它明确地表明，该方法给出了最低的实现相比，其他方法。
This paper proposes a novel method to be used for VLSI design of canonic signed digit (CSD) linear phase finite impulse response filter with a small number of adders and registers. This proposed method is an efficient way to find the correct bit-patterns for horizontal and vertical common subexpression elimination technique. Through examples, it is shown explicitly that this proposed method gives the lowest implementation compared to other methods.