Advancing CMOS-Type Ising Arithmetic Unit into the Domain of Real-World Applications

Advancing CMOS-Type Ising Arithmetic Unit into the Domain of Real-World Applications
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DOI:
10.1109/tc.2017.2775618
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发表时间:
2018-05
影响因子:
3.7
通讯作者:
Jian Zhang;Shuming Chen;Yaohua Wang
Jian Zhang;Shuming Chen;Yaohua Wang
中科院分区:
计算机科学2区
文献类型:
--
作者:
Jian Zhang;Shuming Chen;Yaohua Wang

文献摘要

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组合优化问题的求解是冯诺依曼体系结构计算面临的一个巨大挑战。虽然Ising模型可以为这些问题提供有前途的解决方案,但现有的Ising芯片,包括MEMS,光学和CMOS类型的电路实现,不能满足现实世界的组合优化应用的精度要求。为了方便对实际应用的支持,我们提出了三个改进现有的CMOS型伊辛芯片:适当的窄位宽存储单元与近似乘加器,双随机源翻转方法与交叉随机数发生器和相邻自旋节点之间的共享电路设计。通过上述改进,我们在保持CMOS型Ising芯片低成本特性的同时,实现了高精度。在搜索Ising模型的基态时,我们的CMOS型Ising芯片可以将精度提高到99%以上,精度约为93%。此外,它的硬件成本仅为普通实现的32%,以达到同样的高精度。特别地,我们已经将我们的Ising芯片应用于图像分割应用,这是一个典型的现实应用。结果表明,与传统计算机上运行的近似算法相比,要找到质量相似的分割,我们的CMOS型Ising芯片可以将分割处理速度提高1900倍,而能耗仅为0.017‰。
Solving combinatorial optimization problems is a great challenge for Von Neumann-architecture computing. Although the Ising model could provide promising solutions for such problems, existing Ising chips, including superconductive, optical and CMOS-type circuit implementation, cannot meet the precision requirement of real-world combinatorial optimization applications. To facilitate the support for real-world applications, we propose three improvements over existing CMOS-type Ising chips: suitable narrow bit width memory cells with approximate multiply-adders, double random sources flipping method with cross random number generators and shared circuit design between adjacent spin nodes. With above improvements, we achieve high precision as well as maintaining the low cost characteristic of CMOS-type Ising chips. When searching the ground state of Ising models, our CMOS-type Ising chip can improve the precision to more than 99 percent over existing ones with about 93 percent precision. Moreover, its hardware cost is only 32 percent of the common implementation to achieve the same high precision. Specially, we have applied our Ising chip in image segmentation applications, a typical real-world application. The results show that, to find a segmentation with similar quality, our CMOS-type Ising chip can speed up the segmenting processing by 1900× with only 0.017‰ energy consumption compared with approximate algorithms operating on conventional computers.