Digital pixel readout integrated circuit architectures for LWIR
Digital pixel readout integrated circuit architectures for LWIR
复制标题
用于长波红外 (LWIR) 的数字像素读出集成电路架构
DOI：
10.1117/12.2177551
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发表时间：
2015
期刊：
影响因子：
--
通讯作者：
Y. Gurbuz
中科院分区：
文献类型：
--
作者：
A. Shafique;M. Yazici;Huseyin Kayahan;O. Ceylan;Y. Gurbuz
本文提出并讨论了基于CMOS技术的长波红外（LWIR）数字像素读出集成电路结构。给出了扫描型和凝视型探测器的结构设计。对于扫描阵列，采用CMOS 180nm技术在8像素上实现了数字时延集成（TDI），采样率高达3。ROIC输入参考噪声低于750 rms电子，功耗明显低于30mW。ROIC设计经过优化，可以在室温和低温下运行。针对凝视型阵列，提出了一种基于脉冲调频（PFM）粗量化和扩展积分的数字像元结构。它可以实现2.04Ge的极端电荷处理能力-在CMOS 90nm技术下，以20位输出分辨率和低于350 nW的功耗。采用了一种有效的时间测量机制来估计积分电容的剩余电荷，以达到低信噪比的目的。
This paper presents and discusses digital pixel readout integrated circuit architectures for long wavelength infrared (LWIR) in CMOS technology. Presented architectures are designed for scanning and staring arrays type detectors respectively. For scanning arrays, digital time delay integration (TDI) is implemented on 8 pixels with sampling rate up to 3 using CMOS 180nm technology. Input referred noise of ROIC is below 750 rms electron meanwhile power dissipation is appreciably under 30mW. ROIC design is optimized to perform at room as well as cryogenic temperatures. For staring type arrays, a digital pixel architecture relying on coarse quantization with pulse frequency modulation (PFM) and novel approach of extended integration is presented. It can achieve extreme charge handling capacity of 2.04Ge- with 20 bit output resolution and power dissipation below 350 nW in CMOS 90nm technology. Efficient mechanism of measuring the time to estimate the remaining charge on integration capacitor in order to achieve low SNR has employed.