A Dynamic Optically Reconfigurable Gate Array—Perfect Emulation
A Dynamic Optically Reconfigurable Gate Array—Perfect Emulation
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动态光学可重构门阵列——完美仿真
DOI：
10.1109/jqe.2008.916705
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发表时间：
2008
影响因子：
2.5
通讯作者：
Minoru Watanabe
中科院分区：
文献类型：
--
作者：
D. Seto;Minoru Watanabe
提出了一种基于全息存储器和传统的动态光可重构门阵列（ORGA）VLSI的DORGA结构仿真。在ORGAs中，虽然可以通过利用全息存储器的大容量存储能力来实现大的虚拟门数，但是作为可编程门阵列VLSI的门数的实际门数对于提高瞬时性能是重要的。然而，在先前提出的ORGA-VLSI中，用于存储单个配置上下文的静态配置存储器消耗了ORGA-VLSI的大的实现区域，并且阻止了大门计数的ORGA-VLSI的实现。因此，一个DORGA架构已被提出，以增加栅极密度。它利用光电二极管的结电容作为动态存储器，从而避免了静态配置存储器。然而，迄今为止，一个完美的光学可重构的DORGA-VLSIs架构的演示从来没有提出。因此，在这项研究中，DORGA架构是完美的模拟，和性能，特别是重构上下文保留时间，进行了实验测量。这种架构的优点进行了讨论的结果。
This paper presents a perfect dynamic optically reconfigurable gate array (DORGA) architecture emulation using a holographic memory and a conventional ORGA-VLSI. In ORGAs, although a large virtual gate count can be realized by exploiting the large-capacity storage capability of a holographic memory, the actual gate count, which is the gate count of a programmable gate array VLSI, is important to increase the instantaneous performance. Nevertheless, in previously proposed ORGA-VLSIs, the static configuration memory to store a single configuration context consumed a large implementation area of the ORGA-VLSIs and prevented the realization of large-gate-count ORGA-VLSIs. Therefore, a DORGA architecture has been proposed in order to increase the gate density. It uses the junction capacitance of photodiodes as dynamic memory, thereby obviating the static configuration memory. However, to date, demonstration of a perfect optically reconfigurable architecture for DORGA-VLSIs has never been presented. Therefore, in this study, the DORGA architecture was perfectly emulated, and the performance, particularly the reconfiguration context retention time, was measured experimentally. The advantages of this architecture are discussed in relation to the results.