Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs

Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs
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FPGA 上多分辨率应用高级综合的代码生成

DOI:
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发表时间:
2014
期刊:
arXiv.org
影响因子:
--
通讯作者:
J. Teich
J. Teich
中科院分区:
--
文献类型:
--
作者:
Moritz Schmid;Oliver Reiche;Christian Schmitt;Frank Hannig;J. Teich

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多分辨率分析(MRA)是一种基于在不同尺度上处理问题的数学方法。它的应用之一是医学成像,其中基于高斯和拉普拉斯图像金字塔概念的多尺度处理是一种众所周知的技术。它通常用于在不修改滤波器核的情况下,在保留不同粒度级别的图像细节的同时降低噪声。在科学计算中,多重网格方法作为椭圆型偏微分方程(PDEs)的渐近最优解是一种流行的选择。由于这种算法具有非常高的计算复杂性,在存在实时约束的情况下会使cpu不堪重负,因此需要考虑特定于应用程序的处理器来实现。尽管在利用各自领域的生产力方面取得了巨大的进步,但设计师仍然需要对编码技术和目标架构有详细的了解,以实现高效的解决方案。最近,HIPA cc框架被提出作为一种基于领域特定语言(DSL)的图像处理算法的自动代码生成手段。从相同的代码库中,可以生成在几种加速器技术上有效实现的代码,包括不同类型的图形处理单元(gpu)以及可重构逻辑(fpga)。在这项工作中,我们展示了HIPA cc在fpga和嵌入式gpu上为实现多分辨率应用程序生成代码的能力。我的介绍
Multiresolution Analysis (MRA) is a mathematical method that is based on working on a problem at different scales. One of its applications is medical imaging where pro- cessing at multiple scales—based on the concept of Gaussian and Laplacian image pyramids—is a well-known technique. It is often applied to reduce noise while preserving image detail on different levels of granularity without modifying the filter kernel. In scientific computing, multigrid methods are a popular choice, as they are asymptotically optimal solvers for elliptic Partial Differential Equations (PDEs). As such algorithms have a very high computational complexity that would overwhelm CPUs in the presence of real-time constraints, application-specific processors come into consideration for implementation. Despite of huge advancements in leveraging productivity in the respective fields, designers are still required to have detailed knowledge about coding techniques and the targeted architecture to achieve efficient solutions. Recently, the HIPA cc framework was proposed as a means for automatic code generation of image processing algorithms, based on a Domain-Specific Language (DSL). From the same code base, it is possible to generate code for efficient implementations on several accelerator technologies including different types of Graphics Processing Units (GPUs) as well as reconfigurable logic (FPGAs). In this work, we demonstrate the ability of HIPA cc to generate code for the implementation of multiresolution applications on FPGAs and embedded GPUs. I. INTRODUCTION
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