Monolayer Nitrogen-Atom Distributions in Ultrathin Gate Dielectrics by Low-Temperature Low-Thermal-Budget Processing
Monolayer Nitrogen-Atom Distributions in Ultrathin Gate Dielectrics by Low-Temperature Low-Thermal-Budget Processing
复制标题
通过低温低热预算处理实现超薄栅极电介质中的单层氮原子分布
DOI：
10.1143/jjap.34.6827
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发表时间：
1995
影响因子：
1.5
通讯作者：
J. Hauser
中科院分区：
文献类型：
--
作者：
G. Lucovsky;David R. Lee;S. Hattangady;H. Niimi;Ze Jing;C. Parker;J. Hauser
本文所报道的研究是基于一种结合等离子体和快速热处理的低温/低热预算器件制造方法，该方法已被定制为分别控制i)N原子的成键化学和成分分布，以及ii)叠层栅结构中的结构和化学弛豫。通过将低温(∼300°C)等离子体辅助工艺与低热预算快速热退火相结合以促进化学和结构弛豫，从而最大限度地减少缺陷和缺陷前体，已经实现了在晶体-多晶-硅界面的单层水平以及在大块介质内的合金水平上控制N原子的掺入。器件测量表明，N原子的掺入提高了场效应晶体管热载流子退化的可靠性。
The research reported in this paper is based on an approach to low-temperature/low-thermal budget device fabrication that combines plasma and rapid thermal processing, and which has been customized to control separately i) the N-atom bonding chemistry and composition profiles, and ii) the structural and chemical relaxations in stacked gate structures. Control of N-atom incorporation at the monolayer level at the crystalline- and polycrystalline-Si interfaces, and at alloy levels within the bulk dielectrics has been achieved by combining low-temperature (∼300° C) plasma-assisted processes to generate the N-atom concentration profiles, with low-thermal-budget rapid thermal annealing (RTA) to promote chemical and structural relaxations that minimize defects and defect precursors. Device measurements indicate that N-atom incorporation improves reliability with respect to hot carrier degradation of field effect transistors.