Printed Microprocessors

Printed Microprocessors
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印刷微处理器

DOI:
10.1109/isca45697.2020.00028
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发表时间:
2020
期刊:
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
影响因子:
--
通讯作者:
Rakesh Kumar
Rakesh Kumar
中科院分区:
--
文献类型:
--
作者:
Nathaniel Bleier;Muhammad Husnain Mubarik;F. Rasheed;J. Aghassi‐Hagmann;M. Tahoori;Rakesh Kumar

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印刷电子产品有望满足新兴一次性和超低成本利润应用的成本和共形性需求。最近的印刷电路技术还具有低电源电压,因此可以由电池供电。在本文中,我们探讨了在此类印刷技术中实现的微处理器的设计空间 - 这些印刷微处理器将用于具有低成本、共形性和可编程性要求的电池供电应用。为了实现这一设计空间探索,我们首先介绍 EGFET 和 CNT-TFT 印刷技术的标准单元库 - 据我们所知,这些是适用于任何低压印刷技术的第一个综合和物理设计就绪的标准单元库。然后,我们介绍了采用 EGFET 和 CNT-TFT 技术的几种现成低门数微处理器(Z80、light8080、ZPU 和 openMSP430)的面积、功耗和延迟特性。我们的表征表明,电池供电的印刷微处理器可以切实针对多种印刷应用。然而,我们的结果还表明需要显着减少此类印刷微处理器的面积和功率。我们对印刷微处理器架构的多个参数(数据宽度、管道深度等)进行了设计空间探索。我们表明,最好的内核在功耗和面积方面优于现有内核至少一个数量级。最后,我们表明,特定于打印的架构和低级优化进一步改善了低压电池兼容的印刷微处理器的面积和功率特性。例如,特定于程序的 ISA 将功耗和面积分别提高了 4.18 倍和 1.93 倍。基于交叉点的指令 ROM 在功耗、面积和延迟方面分别优于基于 RAM 的设计 5.77 倍、16.8 倍和 2.42 倍。
Printed electronics holds the promise of meeting the cost and conformality needs of emerging disposable and ultra-low cost margin applications. Recent printed circuits technologies also have low supply voltage and can, therefore, be battery-powered. In this paper, we explore the design space of microprocessors implemented in such printing technologies - these printed microprocessors will be needed for battery-powered applications with requirements of low cost, conformality, and programmability. To enable this design space exploration, we first present the standard cell libraries for EGFET and CNT-TFT printed technologies - to the best of our knowledge, these are the first synthesis and physical design ready standard cell libraries for any low voltage printing technology. We then present an area, power, and delay characterization of several off-the-shelf low gate count microprocessors (Z80, light8080, ZPU, and openMSP430) in EGFET and CNT-TFT technologies. Our characterization shows that several printing applications can be feasibly targeted by battery-powered printed microprocessors. However, our results also show the need to significantly reduce area and power of such printed microprocessors. We perform a design space exploration of printed microprocessor architectures over multiple parameters - datawidths, pipeline depth, etc. We show that the best cores outperform pre-existing cores by at least one order of magnitude in terms of power and area. Finally, we show that printing-specific architectural and low-level optimizations further improve area and power characteristics of low voltage battery-compatible printed microprocessors. Program-specific ISA, for example, improves power, and area by up to 4.18x and 1.93x respectively. Crosspoint-based instruction ROM outperforms a RAM-based design by 5.77x, 16.8x, and 2.42x respectively in terms of power, area, and delay.
DOI: 10.1039/c7nr08115d
发表时间: 2018-03-28
期刊: NANOSCALE
影响因子: 6.7
作者:
He, P.;Brent, J. R.;Derby, B.
通讯作者: Derby, B.