Interconnect Routing for Large-Scale RSFQ Circuits
Interconnect Routing for Large-Scale RSFQ Circuits
复制标题
大规模 RSFQ 电路的互连路由
DOI：
10.1109/tasc.2019.2903023
复制
发表时间：
2019
影响因子：
1.8
通讯作者：
E. Friedman
中科院分区：
文献类型：
--
作者：
T. Jabbari;G. Krylov;S. Whiteley;E. Mlinar;J. Kawa;E. Friedman
现代快速单通量量子（RSFQ）电路日益复杂，使得片上信号路由成为一个日益重要的问题。本文描述了几种用于大规模RSFQ电路路由的方法，并提出了一个确定何时使用无源微带传输线（PTL）和有源约瑟夫森传输线（JTL）的过程。本文还讨论了JTL电感和约瑟夫森结的尺寸对JTL链长度的影响。评估了JTL电感对物理布局的依赖关系，并分析了主要PTL参数对延迟的影响。提出了一种新的PTL驱动和接收配置。在接收和驱动电路中，对jj的数量、电感和PTL带状线的长度进行了权衡。计算了两种不同互连方式的能耗。讨论了所提出的PTL电路与优化后的JTL电路在能量损耗和延迟方面的权衡。确定了选择最佳元件值的指导方针，并实现了在10ka /cm$^2$技术下工作于20ghz的拟议接收器的偏置电流的模拟偏置裕度为$\pm$ 29%，用于1毫米传输线。总结了SFQ VLSI电路中驱动长互连所需的自动化布局和综合的指导原则和设计权衡。
The increasing complexity of modern rapid single flux quantum (RSFQ) circuits has made on-chip signal routing, an issue of growing importance. In this paper, several methods for routing large-scale RSFQ circuits are described, and a process is presented for determining when to use passive microstrip transmission lines (PTL) and active Josephson transmission lines (JTL). The effect of the size of the JTL inductor and Josephson junctions on the length of a JTL chain for a target delay is also discussed. The dependence of the JTL inductance on the physical layout is evaluated, and the effects of the primary PTL parameters on delay are characterized. A novel PTL driver and receiver configuration is also proposed. Tradeoffs among the number of JJs, inductance, and length of a PTL stripline in the receiver and driver circuits are reported. The energy dissipation is evaluated for two different interconnects. A tradeoff between the proposed PTL circuits and an optimized JTL in terms of energy dissipation and delay is discussed. Guidelines for choosing the optimal element values are determined, and a simulated bias margin of $\pm$ 29% for the bias current of the proposed receiver operating at 20 GHz in a 10 kA/cm$^2$ technology for a 1-mm transmission line is achieved. Summarizing, guidelines and design tradeoffs appropriate for automated layout and synthesis are provided for driving long interconnect in SFQ VLSI circuits.