A Comprehensive Gate and Drain Trapping/Detrapping Noise Model and its Implications for Thin-Dielectric MOSFETs
A Comprehensive Gate and Drain Trapping/Detrapping Noise Model and its Implications for Thin-Dielectric MOSFETs
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全面的栅极和漏极捕获/去捕获噪声模型及其对薄电介质 MOSFET 的影响
DOI：
10.1109/ted.2021.3104790
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发表时间：
2021
影响因子：
3.1
通讯作者：
L. Selmi
中科院分区：
文献类型：
--
作者：
R. Asanovski;P. Palestri;E. Caruso;L. Selmi
我们推导出一套完整的表达式MOSFET的栅极和漏极功率谱密度由于弹性和非弹性捕获/脱陷沟道载流子进入栅极介质。我们的计算解释陷阱/脱陷噪声（TDN）在各种FET的工作区域和突出陷阱的位置相关的条款，往往被忽视的文献中，这是重要的，而不是薄栅漏的设备。此外，我们表明，TDN有贡献的栅极电流噪声，与漏极电流的波动，我们强调的作用，沟道电荷波动和漏极电流之间的传递函数的噪声特性。模型表达式进行了仔细验证，通过比较与2-D和3-D TCAD模拟的规模MOSFET与不同的架构（体，完全耗尽绝缘体上硅（FD-SOI），FinFET），沟道和栅极材料。除了对TDN有新的认识外，这些结果还可以提高从实验样品中提取陷阱密度的准确性，并为MOSFET中TDN的完整和准确的紧凑模型铺平道路。
We derive a complete set of expressions for the MOSFET gate and drain power spectral densities due to elastic and inelastic trapping/detrapping of channel carriers into the gate dielectric. Our calculations explain trapping/detrapping noise (TDN) in various FET operating regions and highlight trap’s position-dependent terms, often neglected in the literature, which are instead important for devices with thin gate dielectrics. Furthermore, we show that TDN has a contribution to the gate current noise, correlated with the drain current fluctuations and we highlight the role of the transfer function between channel charge fluctuations and drain current on the noise characteristics. The model expressions are carefully validated by comparison with 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures (bulk, fully depleted-silicon-on-insulator (FD-SOI), FinFET), channel, and gate materials. Besides shedding new light on TDN, the results could enable trap density extraction from experimental samples with improved accuracy and pave the way to complete and accurate compact models for TDN in MOSFETs.