Ultra-Low Switching Power RRAM Using Hopping Conduction Mechanism
Ultra-Low Switching Power RRAM Using Hopping Conduction Mechanism
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DOI：
10.1149/05004.0003ecst
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发表时间：
2013-03
期刊：
影响因子：
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通讯作者：
A. Chin;Chun‐Hu Cheng;Y. Chiu;Z. W. Zheng;Ming Liu
中科院分区：
文献类型：
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作者：
A. Chin;Chun‐Hu Cheng;Y. Chiu;Z. W. Zheng;Ming Liu
随着浮栅（FG）闪存持续缩小至20 nm以下，耐久性和保持性下降的挑战变得更加严峻。这些退化的存储器特性是由于存储在高度缩放的存储器单元中的较少数量的电荷的基本物理特性。尽管高陷阱密度电荷俘获（CT）闪存的使用[1][2]扩展了缩放一代，但仍需要开发用于高度缩放的1X nm器件的新存储器单元。
The challenges of degraded endurance and retention become more severe, as the floating-gate (FG) flash memory continues down-scaling toward sub-20 nm. These degraded memory characteristics are due to the fundamental physics of smaller number of charges stored in the highly scaled memory cell. Although the use of high trap-density charge-trapping (CT) flash memory [1][2] extends the scaling generation, new memory cell still needs to be developed for highly scaled 1X nm device.