A Dependable Processor by Using Built-in Self Test to Tolerate Periodical Transient Faults under Highly Electromagnetic Environment
A Dependable Processor by Using Built-in Self Test to Tolerate Periodical Transient Faults under Highly Electromagnetic Environment
复制标题
可靠的处理器，通过使用内置自测试来承受强电磁环境下的周期性瞬态故障
DOI：
10.1109/prdc.2012.19
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发表时间：
2012
期刊：
影响因子：
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通讯作者：
S. Fukumoto
中科院分区：
文献类型：
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作者：
Aromhack Saysanasongkham;Masahiko Negishi;M. Arai;S. Fukumoto
本文发布了高电磁环境下容错时序电路技术针对周期性瞬态故障的应用报告。在我们之前的论文中在计数器上实现了所提出的容错技术之后，作为所提出的架构如何在公用事业规模的时序电路上执行的示例，说明了将该技术应用于处理器所获得的结果。在逻辑仿真的基础上，我们确认最初设计的具有功能性BIST的8位处理器可以避免周期性的多重瞬态故障。我们进一步表明，从电路空间的角度来看，具有处理器实际尺寸的时序电路可以以低开销应用容错技术。
This paper releases a report of the application for the fault tolerant sequential circuit technique against periodical transient faults under highly electromagnetic environment. After implementing the proposed fault tolerant technique on a counter in our previous paper, as an example of how the proposed architecture performs on utility-scale sequential circuits, the result obtained by applying the technique to a processor is illustrated. On the basis of our logic simulation, we confirm that the originally designed 8-bit processor with functional BIST can avoid the periodical multiple transient faults. We further show that sequential circuits with a practical size of a processor can apply the fault tolerant technique with low overhead from the viewpoint of the circuit space.