An Alternating Spacer AES Crypto-processor
An Alternating Spacer AES Crypto-processor
复制标题
交替间隔 AES 加密处理器
DOI：
10.1109/esscir.2006.307547
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发表时间：
2006
期刊：
影响因子：
--
通讯作者：
A. Yakovlev
中科院分区：
文献类型：
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作者：
Julian P. Murphy;A. Yakovlev
已经制造了AES加密处理器，以研究交替的间隔双轨逻辑样式和基于安全的设计流的安全性。这引入了以前未使用的状态，以差异性平衡。在SmartCard的秘密钥匙的终生期间，其果实为信息泄漏提供了切实的解决方案，同时至关重要的是，将SmartCard安全性提高的昂贵成本降至最低：设计经济学，区域和功率。对设备的功率分析导致在未修改和建筑上相同的设计上破解128位秘密钥匙所需的功率测量数量增加了40倍。与其他报告的电力平衡方法相比，面积仅增加88％（Pop，2005）
An AES crypto-processor has been fabricated to investigate the security properties of an alternating spacer dual-rail logic style and a security based design flow; which introduces a previously unused state in differential power-balancing. The fruits of which offer a tangible solution to information leakage during the life-time of a smartcard's secret key, whilst crucially keeping the usually expensive costs of increased smartcard security to a minimum: design economics, area and power. Power analysis on the device results in a forty fold increase in the number of power measurements needed to crack the 128-bit secret key over an unmodified and architecturally identical design. Area is only increased by 88% compared to 3-4times in other reported power-balancing methods (Pop, 2005)