Design, implementation and applications of low-complexity LDPC codes

Design, implementation and applications of low-complexity LDPC codes
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低复杂度LDPC码的设计、实现及应用

DOI:
10.1109/icspcs.2008.4813651
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发表时间:
2008
期刊:
2008 2nd International Conference on Signal Processing and Communication Systems
影响因子:
--
通讯作者:
N. Pandya
N. Pandya
中科院分区:
--
文献类型:
--
作者:
B. Honary;B. M. Heravi;S. Kariyawasam;N. Pandya

文献摘要

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Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity down to the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as balanced-incomplete block-design (BIBD) and finite fields to design quasi-cyclic LDPC (QC-LDPC) codes. Well designed QC-LDPC codes can perform as well as randomly constructed LDPC codes with iterative decoding based on belief propagation in terms of bit-error probability. It has been shown that QC-LDPC codes can achieve lower error floor than randomly constructed LDPC codes. Within this work, the design of quasi-cyclic LDPC codes for a range of practical applications is discussed which includes construction of variable-rate large-block-length LDPC codes for DVB-S2 and DVB-T2 applications and adaptive short-block-length LDPC codes for HF applications. Moreover, efficient implementation of QC-LDPC decoder/encoder for FPGA devices which reduces memory requirements is presented.