Hexagon DSP: An Architecture Optimized for Mobile Multimedia and Communications
Hexagon DSP: An Architecture Optimized for Mobile Multimedia and Communications
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Hexagon DSP：针对移动多媒体和通信优化的架构
作者：
L. Codrescu;W. Anderson;Suresh Venkumanhanti;M. Zeng;Erich Plondke;C. Koob;Ajay Ingle;Charles Tabony;Rick Maule
异构计算对于满足功率和性能目标的移动产品至关重要。现在是第五代的高通六边形DSP，用于调制解调器处理和多媒体加速度。通过卸载从CPU到DSP等多媒体任务，例如语音，音频，传感器和图像处理，Hexagon可以节省大量功率。六边形具有独特的体系结构，该体系结构结合了特定于应用程序的说明，VLIW指令集体系结构和硬件多线程。设计方法是最大程度地提高每个周期的工作以进行性能，但以适中的时钟速度运行，并将实现集中在低功率上。本文概述了六边形体系结构。该处理器旨在与移动CPU替代方案相比提供较高的能源效率，从而有助于为重要的移动应用实现较长的电池寿命。
Heterogeneous computing is essential for mobile products to meet power and performance targets. The Qualcomm Hexagon DSP, now in its fifth generation, is used for both modem processing and multimedia acceleration. By offloading multimedia tasks such as voice, audio, sensor, and image processing from the CPU to the DSP, Hexagon achieves significant power savings. Hexagon features a unique architecture that combines application-specific instructions, a VLIW instruction set architecture, and hardware multithreading. The design approach is to maximize work per cycle for performance, but run at modest clock speeds and focus the implementation on low power. This article provides an overview of the Hexagon architecture. The processor is designed to deliver far superior energy efficiency compared to mobile CPU alternatives and thereby help achieve long battery life for important mobile applications.