Impact of SMT-induced edge dislocation positions to NFET performance

Impact of SMT-induced edge dislocation positions to NFET performance
复制标题

DOI：
10.1109/drc.2015.7175621
复制
发表时间：
2015-06
期刊：
2015 73rd Annual Device Research Conference (DRC)
影响因子：
--
通讯作者：
T. Shen;Shui-Jinn Wang;Z. Xiao;Chung-Cheng Wu;Jeff Wu;Carlos H. Díaz
T. Shen;Shui-Jinn Wang;Z. Xiao;Chung-Cheng Wu;Jeff Wu;Carlos H. Díaz
中科院分区：
其他
文献类型：
--
作者：
T. Shen;Shui-Jinn Wang;Z. Xiao;Chung-Cheng Wu;Jeff Wu;Carlos H. Díaz

文献摘要

被引文献

相似文献

这项工作突出了nFET器件设计中SMT引起的边缘位错位置的影响。基于实验结果和原子输运模拟，位错与减少接近度和深度将增加的SF和TD的量，这引起高寄生电阻和高Iboff漏电流一起。在先进的器件设计中，应在应变迁移率、寄生电阻和Iboff之间进行权衡。
This work highlights the impact of SMT-induced edge-dislocation positions in nFET device design. Based on experimental results and atomic transport simulation, dislocations with reduced proximity and depth would increase the amount of SFs and TDs which induce high parasitic resistance and high Iboff leakage current together. Trade-off among strained mobility, parasitic resistance and Iboff should be made for advanced device design.